Travis Geiselbrecht ce9f4f6db2 [arch][riscv] using a new trick utilize real instructions to zero fpu state ...

Previously was hard coding the instructions to work around a limitation
of the assembler that did not allow using fpu instructions when the code
was being compiled without support. Move the zeroing routine into a
separate assembly file and override the architure at the top.

2022-03-12 17:39:00 -08:00

..

arm

[arch][warnings] fix -Wmissing-declarations warnings

2021-10-21 23:08:38 -07:00

arm64

[arch][arm64] save the boot arg registers (x0-x3) in a temporary spot in the boot path

2022-02-10 22:34:02 -08:00

include

[arch] have each arch define ARCH_HAS_MMU

2021-03-30 02:48:59 -07:00

m68k

[platform][m68k-virt] parse the BOOTINFO structure qemu uses to pass info

2022-02-11 00:37:51 -08:00

microblaze

[arch][warnings] fix -Wmissing-declarations warnings

2021-10-21 23:08:38 -07:00

mips

[arch][warnings] fix -Wmissing-declarations warnings

2021-10-21 23:08:38 -07:00

or1k

[arch] have each arch define ARCH_HAS_MMU

2021-03-30 02:48:59 -07:00

riscv

[arch][riscv] using a new trick utilize real instructions to zero fpu state

2022-03-12 17:39:00 -08:00

test

[arch][test][mmu] add a simple test case to map a page and query the restult

2021-12-05 23:24:04 -08:00

x86

[arch][x86] left shift 32 bits rather 31 bits to construct msr value

2022-02-09 12:22:30 -08:00

arch.c

[include] move almost all of the remainder of top level includes into a subdir

2019-07-13 16:09:27 -07:00

rules.mk

[include] move almost all of the remainder of top level includes into a subdir

2019-07-13 16:09:27 -07:00