Travis Geiselbrecht 1db813d2f6 [arch][riscv] spiff up the spinlock code a bit ...

Move out of inline routines since the body is relatively
large and to keep the disassembly clean. Have spinlocks
store the holder cpu + 1 instead of just 1. Add an appropriate
barrier to the release.

2021-03-30 02:48:59 -07:00

..

arm

[arch] have each arch define ARCH_HAS_MMU

2021-03-30 02:48:59 -07:00

arm64

[arch] have each arch define ARCH_HAS_MMU

2021-03-30 02:48:59 -07:00

include

[arch] have each arch define ARCH_HAS_MMU

2021-03-30 02:48:59 -07:00

microblaze

[arch] tweak arch_cycle_count prototype to return a ulong

2020-05-16 17:55:50 -07:00

mips

[arch] tweak arch_cycle_count prototype to return a ulong

2020-05-16 17:55:50 -07:00

or1k

[arch] have each arch define ARCH_HAS_MMU

2021-03-30 02:48:59 -07:00

riscv

[arch][riscv] spiff up the spinlock code a bit

2021-03-30 02:48:59 -07:00

test

[arch][test] add a new unittest for the arch mmu code

2021-03-30 02:48:59 -07:00

x86

[arch] have each arch define ARCH_HAS_MMU

2021-03-30 02:48:59 -07:00

arch.c

[include] move almost all of the remainder of top level includes into a subdir

2019-07-13 16:09:27 -07:00

rules.mk

[include] move almost all of the remainder of top level includes into a subdir

2019-07-13 16:09:27 -07:00