445f3e4ee7
Mostly driver code in various platforms. There are still some warnings in this part of the tree in lesser-used platforms.
75 lines
1.6 KiB
C
75 lines
1.6 KiB
C
/*
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* Copyright (c) 2012 Travis Geiselbrecht
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#include <stdarg.h>
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#include <lk/reg.h>
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#include <lk/debug.h>
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#include <stdio.h>
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#include <kernel/thread.h>
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#include <platform/debug.h>
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#include <arch/ops.h>
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#include <dev/uart.h>
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#include <target/debugconfig.h>
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#include <platform/stm32.h>
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#include <stm32f4xx_rcc.h>
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#include <stm32f4xx_usart.h>
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#include <arch/arm/cm.h>
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void stm32_debug_early_init(void) {
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uart_init_early();
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}
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/* later in the init process */
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void stm32_debug_init(void) {
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uart_init();
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}
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#define ITM_STIM0 0xE0000000
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#define ITM_TCR 0xE0000E80
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void platform_dputc(char c) {
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// if ITM is enabled, send character to STIM0
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if (readl(ITM_TCR) & 1) {
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while (!readl(ITM_STIM0)) ;
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writeb(c, ITM_STIM0);
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}
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if (c == '\n')
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uart_putc(DEBUG_UART, '\r');
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uart_putc(DEBUG_UART, c);
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}
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int platform_dgetc(char *c, bool wait) {
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int ret = uart_getc(DEBUG_UART, wait);
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if (ret == -1)
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return -1;
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*c = ret;
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return 0;
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}
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void __debugger_console_putc(char c);
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#define DCRDR 0xE000EDF8
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void _debugmonitor(void) {
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u32 n;
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arm_cm_irq_entry();
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n = readl(DCRDR);
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if (n & 0x80000000) {
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switch (n >> 24) {
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case 0x80: // write to console
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__debugger_console_putc(n & 0xFF);
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n = 0;
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break;
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default:
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n = 0x01000000;
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}
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writel(n, DCRDR);
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}
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arm_cm_irq_exit(1);
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}
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