936ee8ac81
Doesn't do much but provided the detection path for it and ability to hold initialized state. The higher level platform code is going to need to use it directly so will mostly just provide an api for access to it. Moved ACPI sniffing back to just after the VM is initialized instead of all the way into platform_init(). This should try to ensure that all drivers that come up afterwards will have ioapics discovered in case future development tries to enable and use them, kicking the machine out of virtual-wire-mode.
106 lines
3.1 KiB
C
106 lines
3.1 KiB
C
/*
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* Copyright (c) 2021 Travis Geiselbrecht
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#include "arch/x86/apic.h"
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#include <sys/types.h>
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#include <lk/debug.h>
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#include <lk/err.h>
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#include <lk/reg.h>
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#include <lk/trace.h>
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#include <lk/init.h>
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#include <assert.h>
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#include <arch/x86.h>
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#include <kernel/spinlock.h>
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#include <kernel/vm.h>
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#define LOCAL_TRACE 0
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enum ioapic_mmio_regs {
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IOAPIC_REGSEL = 0x00,
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IOAPIC_IOWIN = 0x10 / 4,
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};
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enum ioapic_regs {
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IOAPIC_ID = 0x00,
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IOAPIC_VERSION = 0x01,
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IOAPIC_ARB = 0x02,
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IOAPIC_REDIR_TABLE_BASE = 0x10,
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};
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struct ioapic {
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paddr_t phys_addr;
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volatile uint32_t *mmio;
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uint apic_id;
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uint gsi_base;
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uint num_redir_entries;
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// TODO: spinlock for this ioapic
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};
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static struct ioapic *ioapics = NULL;
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static size_t num_ioapics = 0;
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static uint32_t ioapic_read(struct ioapic *ioapic, enum ioapic_regs reg) {
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mmio_write32(ioapic->mmio + IOAPIC_REGSEL, reg);
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return mmio_read32(ioapic->mmio + IOAPIC_IOWIN);
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}
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static uint32_t ioapic_write(struct ioapic *ioapic, enum ioapic_regs reg, uint32_t val) {
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mmio_write32(ioapic->mmio + IOAPIC_REGSEL, reg);
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mmio_write32(ioapic->mmio + IOAPIC_IOWIN, val);
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return 0;
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}
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status_t ioapic_init(int index, paddr_t phys_addr, uint apic_id, uint gsi_base) {
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LTRACEF("%d: phys_addr %#lx apic_id %u gsi_base %u\n", index, phys_addr, apic_id, gsi_base);
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{
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struct ioapic *new_ioapics = realloc(ioapics, sizeof(struct ioapic) * (num_ioapics + 1));
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if (!new_ioapics) {
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return ERR_NO_MEMORY;
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}
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ioapics = new_ioapics;
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}
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struct ioapic *ioapic = &ioapics[num_ioapics];
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LTRACEF("mapping lapic into kernel\n");
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status_t err = vmm_alloc_physical(vmm_get_kernel_aspace(), "ioapic", PAGE_SIZE, (void **)&ioapic->mmio, 0,
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phys_addr, /* vmm_flags */ 0, ARCH_MMU_FLAG_UNCACHED_DEVICE);
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if (err != NO_ERROR) {
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// TODO: free up the newly extended ioapic struct
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return err;
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}
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DEBUG_ASSERT(ioapic->mmio != NULL);
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ioapic->phys_addr = phys_addr;
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ioapic->apic_id = apic_id;
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ioapic->gsi_base = gsi_base;
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// probe the capabilities of the ioapic
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const uint32_t id = ioapic_read(ioapic, IOAPIC_ID) >> 24;
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uint32_t version = ioapic_read(ioapic, IOAPIC_VERSION);
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const uint32_t max_redir = (version >> 16) & 0xff;
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dprintf(INFO, "X86: ioapic %d id %#x version %#x max redir %u\n", index, id, version & 0xff, max_redir);
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ioapic->num_redir_entries = max_redir + 1;
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if (LOCAL_TRACE) {
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for (uint i = 0; i < ioapic->num_redir_entries; i++) {
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// read and dump the current entry
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uint32_t lo = ioapic_read(ioapic, IOAPIC_REDIR_TABLE_BASE + i * 2);
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uint32_t hi = ioapic_read(ioapic, IOAPIC_REDIR_TABLE_BASE + i * 2 + 1);
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dprintf(INFO, "X86: redir %2u hi %#x lo %#x\n", i, hi, lo);
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}
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}
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// add it to the global list of ioapics
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num_ioapics++;
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return NO_ERROR;
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}
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