Commit Graph

2233 Commits

Author SHA1 Message Date
Travis Geiselbrecht
fcb65c9a88 [dev/lib][warnings] fix -Wmissing-declarations warnings in dev/ and lib/ 2021-10-21 23:16:20 -07:00
Travis Geiselbrecht
a895bcece5 [kernel][warnings] fix a few -Wmissing-declarations warnings in the kernel 2021-10-21 23:14:27 -07:00
Travis Geiselbrecht
a6ddffd80b [arch][warnings] fix -Wmissing-declarations warnings 2021-10-21 23:08:38 -07:00
Travis Geiselbrecht
1e88a6c354 [build] add commented out -Wmissing-declarations
This is a useful warning to have on, but keep it off for now since there
are a ton of warnings here, and probably in external projects that use
LK.

CLs incoming to fix the most egregious warning violations this uncovers.
2021-10-21 23:05:24 -07:00
Travis Geiselbrecht
699842fad2 [dev][usb] fix a few unchecked mallocs and add some comments
A few routines had unchecked mallocs. One was unused, so remove it but
add fallback code for the rest of them.
2021-10-20 22:12:05 -07:00
Travis Geiselbrecht
daf1d671b5 [arch][arm-m] fix the pendsv handler for leaving a misaligned stack
The pendsv_ asm handler has been pushing 9 words on the stack prior to
calling into C code. This violates the ABI which requires 8 byte
alignment. It has worked mostly fine and thus hasn't been caught before.

Add an extra bump of the stack to align it after pushing the registers.
2021-10-17 23:01:37 -07:00
Travis Geiselbrecht
11a39f545b [arch][arm] add debug asserts to the non SMP spinlock routines
This should assert that the spinlock is not already held when acquiring
and vice-versa and that interrupts are disabled.
2021-10-07 00:00:22 -07:00
Travis Geiselbrecht
e7c42e22ce [arch][arm-m] Fix a bug with a mismatched acquire/release of the thread lock
Release the thread lock before context switching to a thread that was
preempted and thus not holding the thread lock. Add a few asserts to
make sure this invariant is maintained in the context switch and PENDSV
handler.

This has never mattered before because the thread lock (and other
spinlocks) were not being tested for validity on by definition single
processor cortex-m systems. After adding some code to test the
spinlocks' values this discrepancy was uncovered.
2021-10-07 00:00:22 -07:00
Travis Geiselbrecht
392dd18cfc [external][ARM][CMSIS] save a copy of the CMSIS patch
Save a formatted patch of the last commit to help reapplying in the
future.
2021-10-07 00:00:22 -07:00
Travis Geiselbrecht
4e25fdd11b [external][ARM][CMSIS] reapply the systick patch to cmsis
SysTick_Config() tries to set the systick priority to max. Comment out
this line since arch/arm/arm-m/arch.c sets the priority to medium to
compete with the rest of the exceptions in the system.

Also include lk/compiler.h to avoid redundant cmsis macros.
2021-10-07 00:00:22 -07:00
Travis Geiselbrecht
a0b27a955a [external][ARM][CMSIS] update to cmsis 5.3.2
Taken from https://github.com/ARM-software/CMSIS_5/tree/develop/CMSIS/Core/Include

End of line changed in this patch from DOS to unix so the change looks
larger than it is. View without whitespace diffs to get a cleaner look.
2021-10-07 00:00:22 -07:00
Travis Geiselbrecht
189c0e8cd4 [target][stm32f7-discovery] update the openocd script
Use a newer name for the stlink.cfg file.
2021-10-07 00:00:22 -07:00
Travis Geiselbrecht
d836b07279 [console] add a panic time alternate version of the thread list
This works if the thread lock is held at panic time to keep it from
recursing.
2021-10-07 00:00:22 -07:00
Travis Geiselbrecht
9d2d6feffb [arch][arm64] add cache flush by way/set
Pulled code from Fuchsia to implement way/set cache flush for arm64.

Issue #307
2021-09-29 23:22:25 -07:00
Michael Bishop
d1787042f7 [arch][arm] improve arm chainload
arch_mmu_map was failing hard, because the identity mapping does not fall within the `vmm_get_kernel_aspace`

this creates a new aspace covering the loader, so it can identity map

linux is also unable to use the FPU if lazy FPU context switching had turned it off prior to the chainload, `arm_fpu_set_enable()` is used to turn it back on
2021-09-18 17:14:55 -07:00
Travis Geiselbrecht
cf14bb4fc0 [github][CI] revise the CI builder script
Switch to a more proper matrix. Build each of the projects in a list
with DEBUG=0 and DEBUG=2 and with two versions of the toolchain (7.5.0
and 11.2.0).

Sets things up to be easier to run things like unit tests in a later
patch.
2021-09-18 16:53:52 -07:00
Travis Geiselbrecht
6973ff8bee [build][arch] have arm, arm64, and x86 resort to a default toolchain
Previously if they couldn't find the toolchain they would full stop the
build. Change to print a warning and then go with the default prefix.

Hopefully this doesn't break anyone downstream but it's helpful for the
CI builder which wants to read from the build system which toolchain to
grab prior to having it in the path.
2021-09-18 16:52:38 -07:00
Travis Geiselbrecht
ddd7cba04d [build] add a few pseudo targets to assist with building
list-arch and list-toolchain will compute and print the architecture and
toolchain needed to build the project the build is set to.

Used by the CI builder to decide what toolchain to grab.
2021-09-18 16:51:15 -07:00
Travis Geiselbrecht
20af129a81 [lib][fs] error code for null from malloc 2021-09-18 14:39:59 -07:00
Onath Claridge
3c4a0b96c1 [stm32f0xx] Fix type of overflow counter.
stm32_timer_calc_value was using uint32_t for the overflow counter,
ultimately causing timestamps to wrap as uint32_t.
2021-08-12 13:22:03 -07:00
Travis Geiselbrecht
77fa084cd0 [warnings][gcc 11] Fix a few annoying out of bounds pointer warnings
It seems to be in the case of a string op against a raw address, the
compiler decides the destination object is 0 bytes long and throws a
particular warning. Work around it by not using memcpy in one case and
by disabling the warning in the other.

Both are fairly benign code that basically operates in a hard coded way
that knows the destination buffer is valid.
2021-06-27 00:31:01 -07:00
Travis Geiselbrecht
476b750102 [kernel][ports] double the size of the port message on 64bit hosts
It seems the initial port packet size was sized to hold two words for a
32bit machine. In the 64bit case double the size from 8 bytes to 16.
2021-06-27 00:30:58 -07:00
Travis Geiselbrecht
893b894dd5 [README] fix some formatting on the top level
Guess I need to read the docs on this particular flavor of markup.
2021-06-04 13:25:52 -07:00
Jorge Troncoso
685f557c18 [arch][arm64] unmask_interrupt needs the same numbers as register_int_handler
Signed-off-by: Jorge Troncoso <jatron@users.noreply.github.com>
2021-06-03 18:52:26 -07:00
Travis Geiselbrecht
a0b166c33b [platform][tms570] remove stale platform
Never fully worked.
2021-05-30 18:14:15 -07:00
Travis Geiselbrecht
e3d90834ae [README]
Update the top level readme with a bit more information and a pointer into the docs folder.
2021-05-29 16:58:11 -07:00
Travis Geiselbrecht
7c6cdb9f1d [docs][todo] start a todo file in a new docs folder 2021-05-29 16:46:43 -07:00
Travis Geiselbrecht
89f9805277 [lib][console] move the state of the console into an object
This will allow in the future multiple instances of it to be active at
at a time. Place the current console in a new TLS slot per thread so
threads created as a side effect of console commands can properly run
commands.
2021-05-29 00:52:47 -07:00
Travis Geiselbrecht
c49e63e62c [app] make APP_START work with C++
Needs a __USED tag or the compiler will GC it apparently. Should do the
same thing for other section based trickery.
2021-05-27 03:15:30 -07:00
Travis Geiselbrecht
08aeb5a6ad [libc] fix the extension routine that adds entropy to the random pool
Worked for short entropy but actually would end up zeroing out the new
entropy word.
2021-05-26 02:15:59 -07:00
Travis Geiselbrecht
2c28605d0d [app] add a standalone routine and a command line app start routine 2021-05-26 02:15:59 -07:00
Travis Geiselbrecht
8251133b6d [github][irc] tweak the irc notifier to not use notice 2021-05-26 02:15:59 -07:00
Travis Geiselbrecht
0f04f252d5 [github][irc notify] switch to irc.libera.chat 2021-05-26 02:08:55 -07:00
Wencheng Yang
9f0d53f968 [arch][x86] Unset x86 inner page table entry G bit
The issue was found on AMD machine when run lk with qemu kvm, it
can't boot if kvm hardware is enable in qemu.

According to Intel system programming guild Chapter 4 "Paging",
if the page table entry is non-leaf entry, then the G bit will be
ignored.

However, According to AMD programmer mannul Volume 2, Chapter 5.3
"Long-Mode Page Translation", the non-leaf page table entry G bit
must be zero.

The patch sets inner page table entry G bit to zero so that it
works on both Intel and AMD CPU
2021-05-07 20:51:58 -07:00
Travis Geiselbrecht
035a15325a [arch][riscv] start of FPU support
Add build system support for at least being aware of the FPU on
the architecture, not building code to use it.

At the moment, only sets up the FPU into Initial state prior to
entering user space and then ignores it.
2021-04-13 02:39:34 -07:00
Travis Geiselbrecht
1772e7e890 [arch][riscv] move the iframe definitions into a separate header and add syscall support 2021-04-11 03:38:03 -07:00
Travis Geiselbrecht
38fa93cbbf [arch][riscv] update exception code to handle exceptions from user space
Added two paths in the exception code to deal with coming from user and
kernel space.
Added first stab at a functional arch_enter_uspace()
2021-04-11 02:56:06 -07:00
Travis Geiselbrecht
525d2e9c77 [arch][riscv] switch the percpu pointer to tp reg
For user space support, the sscratch register cannot hold the pointer to
the current cpu, as much as it is convenient.

Change the logic to use tp register (x4) to point to percpu, and
dereference the local thread from it directly.
2021-04-11 01:38:25 -07:00
Travis Geiselbrecht
29d41272b0 [arch][mmu] add more test code to the mmu routines
Create a user space address space, map some pages, query the pages,
context switch, to the new aspace, access the pages.

Basic test that the aspace abstraction is working.

Will generate errors on some of the arches that dont fully implement all
of this, but not a crash.
2021-04-10 15:34:48 -07:00
Travis Geiselbrecht
a3713e8b39 [arch][riscv] add simple support for context switching user space aspaces
Pretty inefficient but probably works well enough.
2021-04-09 02:00:57 -07:00
Travis Geiselbrecht
790916d14e [arch][arm64] fix up a bug introduced in a cherry-pick
display_pc is not defined in LK, so remove it for now.
2021-04-09 00:06:45 -07:00
Travis Geiselbrecht
8b6a43945d [arch][riscv][mmu] permanently allocate top level buffers to help keep user space aspaces in sync
Kind of wasteful, but much simpler than having to manually sync every time something changes
in the kernel aspace. I think riscv machines with mmu can waste 1MB of page tables up front.

Can revisit later if needed.
2021-04-08 23:55:27 -07:00
Marco Nelissen
63b6d95cc9 [arch][arm64] Parse BRK exception
When a crash is because of a BRK instruction, print that instead of
the default "unhandled synchronous exception".

Bug: 179516283


Change-Id: I9667d7157d24a79e2b2ceb7ef283ebc2b09398d0
2021-04-08 23:55:27 -07:00
Nick Bray
3f549a2e25 [make] Defer binding of EXTRA_BUILDDEPS to all::
Currently EXTRA_BUILDDEPS is evaluated before build.mk. This means that
userspace apps or other EXTRA_BUILDRULES cannot add items to
EXTRA_BUILDDEPS and have it function as would be expected.

Bug: 143636864
Change-Id: Idc1504b09f31b4c54148bb6892193d11f45e08ff
2021-04-08 23:55:27 -07:00
Andrei Homescu
7e502816f6 [include][compiler.h] Fix INCBIN/INCFILE macros
The compiler.h header defines two macros INCBIN and
INCFILE that can be used to include binary files
into C sources. This patch fixes a few issues with them:
* The .align directive is equivalent to .p2align
  on some architectures (ARM/AArch64) and to .balign
  on others (x86). INCBIN previously used .align and
  now uses .balign for correct alignment.
* .align 1 enforces a 2-byte alignment on ARM/AArch64,
  which caused the _end symbol for the binary to be off
  by 1 byte in some cases, which the macro previously
  accounted for (incorrectly). With the correct .balign
  directive the extra byte is never added, so the size
  is now correctly computed without the -1 addend.
* INCBIN should end in a .previous directive
  to restore the previous section, since the macro
  starts with .section.

Bug: 115420908
Change-Id: I2149e21d6f7157369a7b374a51af23933bff6b39
2021-04-08 23:55:27 -07:00
Travis Geiselbrecht
f463f50e54 [arch][riscv] add trampoline page table and start user space address space support
Up until now the bottom part of ram has been identity mapped, left over
from initial bootstrapping. Set up two top level page tables: one with the
the identity map and one without. Once the kernel starts switch to the second
but keep the former around for bootstrapping secondary cpus.

Start adding support for user address spaces, currently mostly untested.

Still have to solve the problem of keeping the kernel parts of the page tables
in sync. Will probably preallocate all of the ones needed.
2021-04-03 02:40:32 -07:00
Travis Geiselbrecht
5a3d51e3e7 [assert] fix up a few places broken at DEBUG=0 after recent assert changes
Forgot to test at DEBUG=0. Both of these are basically cases where
the new DEBUG_ASSERT_COND should be used, since the default DEBUG_ASSERT
will now always emit code that gets cleaned up in the optimizer.
2021-04-02 20:16:53 -07:00
Travis Geiselbrecht
897240eb43 [lib][unittest] more improvements from zircon
Have the msg argument be optional in C++.
2021-04-02 19:28:58 -07:00
Travis Geiselbrecht
9a796e868a [assert] update the assert macros
Pull some assert macro improvements back from zircon.

Added new variants that let you pass an arbitrary message.
Move most of the inner routine into a helper, makes for slightly
smaller codegen.
2021-04-02 19:28:58 -07:00
Travis Geiselbrecht
461ecbb677 [make][cpp] bump cpp revision to C++14
Shouldn't be a large problem, since it's been standard in gcc and clang
for quite a few years at this point.
2021-04-02 19:28:58 -07:00