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29 Commits

Author SHA1 Message Date
Zhu, Bing
6216532654 [arch][x86][x64][fpu]fix compile failure when X86_WITH_FPU is not defined. 
With this patch, no compile failure issue when either X86_WITH_FPU not defined
or defined as 0(1).

Signed-off-by: Zhu, Bing <bing.zhu@intel.com>
 2015-11-25 13:36:04 -08:00
Zhu, Bing
9f086cb53a [arch][x86_64][fpu]use correct initial fpu states when each thread is created 
Currently, all new thread created with zero fpu states (512byte buffer of
fxsave area is filled up with 0s), then when a new thread triggers "fpu
device not avialbe" exception (lazy fpu algorithm) at the first time, the
handler just blindly call fxrstor to fetch all those zero states from fxsave
area buffer. This patch is just to guarantee each new thread to have correct
inital fpu states.

Note that x86 fpu code isn't changed in this patch because the 32/64 bit
fpu code are 99% duplicated. I assume that they should be merged in future.

Signed-off-by: Zhu, Bing <bing.zhu@intel.com>
 2015-11-12 14:44:22 -08:00
Zhu, Bing
b6647f5bef [arch][x86][fpu]Change naming convention for FPU flag 
To align with lk/arm flag naming convention, FPU flag
ENABLE_FPU is changed to X86_WITH_FPU

Signed-off-by: Zhu, Bing <bing.zhu@intel.com>
 2015-11-09 22:14:11 +08:00
Travis Geiselbrecht
853c436ea3 [arch][x86] mass-reformat to space indents on all the x86 and x86-64 files 
used scripts/codestyle.space
 2015-11-06 19:32:51 -08:00
Travis Geiselbrecht
e189cd3223 [arch][x86-64] clean up the context switch code to only save required registers 
-Move the guts into a separate asm fileto clean up the fake return hack.
 2015-11-06 19:32:51 -08:00
Travis Geiselbrecht
64fe297cb5 [arch][x86] fix multiboot to properly just cover the data segment, fix x86-64 bug 
-Add -6 switch to do-qemux86 to build and run the x86-64 target
-Fix bug in x86-64 context switch, do not understand how it ever worked.
 2015-11-06 19:32:51 -08:00
Travis Geiselbrecht
121d0b603b [arch] tighten up linker scripts to make sure the section sentinels cover just what they need 2015-11-06 19:32:51 -08:00
Bing Zhu
60c8eb2e56 [arch][x86_64][mmu] fix virtual addr and physical addr validity check 
Canonical address is meaningful only for VIRTUAL address, for physical
address, just check max supported address reported by CPUID capability.
 2015-11-05 16:52:03 -08:00
Travis Geiselbrecht
2c52edce0b [app][tests] set ENABLE_FPU in arch/x86 targets, enable floating point tests 2015-10-27 13:19:07 -07:00
Travis Geiselbrecht
d394f5b83f [arch][x86] fix a few warnings in x86 code 2015-10-27 13:17:50 -07:00
yu-cheng yu
0400a04945 [arch][x86] This is floating point support for intel x86 and x86-64. 
Change-Id: Id0b0e2b69c1d27832eb656935e944c04681b324a
 2015-10-27 13:04:45 -07:00
Travis Geiselbrecht
0e1ce411ba [make] add ability to set EXTRA_LINKER_SCRIPTS in modules 
This allows for individual modules to extend the main linker script,
primarily to add their own sections to interate over.
Remove the main shared_* linker scripts.
 2015-10-26 16:47:18 -07:00
Travis Geiselbrecht
3b2d7a268b [make] remove the need for a module to manually add $(LOCAL_DIR)/include to the global include path 
Pretty much every module in the system was already doing it, so do it
automatically.
 2015-10-19 19:07:16 -07:00
Travis Geiselbrecht
713e138de9 [arch][x86] clean up the way memory size is detected and the vm initialized 
Also fix a few warnings in arch/x86
 2015-10-11 14:09:55 -07:00
Travis Geiselbrecht
5a221c4919 [arch][x86-64] add nulled out arch_sync_cache_range 2015-10-11 12:36:04 -07:00
Shreyas Nagaraj
b58775347c [arch][x86] Removed unwanted null pointer check in MMU query function 2015-07-15 22:20:34 -04:00
Shreyas Nagaraj
57a08b7f65 [arch] [x86] - changes to MMU for x86, x86-64 and x86-PAE 
fixing bugs in page table mgmt and overall MMU code clean-up

Signed-off by: Shreyas Nagaraj <shreyas.nagaraj@intel.com>
 2015-07-01 00:36:12 -04:00
Sergio Rodriguez
f4cc7ac0fd Fixing comilations issues for x86-64 2015-06-17 14:34:31 -07:00
Travis Geiselbrecht
45d56cc2e1 [arch][x86] get x86 building and working again after SMP changes 
-Add UP spinlock routines and irq save/restore
-fix platform/pc drivers to use spinlocks instead of critical_section
 2015-03-10 16:43:55 -07:00
Sergio Rodriguez
ce92871b86 [arch][x86-64] Fixing compiler name prefix 2014-12-11 19:23:12 -08:00
Sergio Rodriguez
737b76684c [arch][x86-64] Adding Virtual memory support with a 1 to 1 mapping 2014-12-11 19:22:58 -08:00
Shreyas Nagaraj
2ff04720f7 [arch][x86-64] MMU fixes - arch_mmu_query, page walking, kernel ld script 2014-12-11 19:22:37 -08:00
Shreyas Nagaraj
e2a45c32b7 [arch][x86_64] more x86-64 MMU changes 2014-12-11 19:22:37 -08:00
Shreyas Nagaraj
78c4eee1c8 [arch][x86-64] MMU enabling 2014-12-11 19:21:33 -08:00
Travis Geiselbrecht
052abe6000 [arch][x86-64] fix the default TOOLCHAIN_PATH setup 
This was broken in a recent make file change by always setting
TOOLCHAIN_PREFIX in the wrapper makefile.
 2014-09-04 16:47:24 -07:00
Travis Geiselbrecht
35f8e0c45e [arch][x86] remove the _heap_end symbol from arch code 
Add bogus _end_of_ram to the x86|x86-64 linker script to satisfy the
heap's initial setup of it. _heap_end is still manipulated in platform
space to reflect the real memory map.
 2014-07-16 20:48:43 -07:00
Travis Geiselbrecht
a99a962333 [arch] update all the arches to implement get_current_thread() 
-For ARM and ARM64, use the cpu local registers
-for X86, X86-64, and ARM-M, use a global variable
 2014-05-03 23:58:50 -07:00
Sergio Rodriguez
c5fbd0a48e Adding proper license for intel work 2014-04-23 12:05:47 -07:00
Sergio Rodriguez
e49f1d4f91 Creating initial commit for x86-64 for LK, this will be the base for the 64 bit version of LK. 2014-04-18 17:09:43 -07:00