Adds shadow registers so secure interrupt state is restored after suspend.
Adds cpu suspend and resume functions.
Disable fiqs in suspend and re-enable in resume.
Change-Id: Ie4a36d55fdd7275267eeeb208e358ab24855ee64
Signed-off-by: Arve Hjønnevåg <arve@android.com>
Allows multiple fiqs to be registered without one fiq handler
interrupting another and corrupting the return state.
Change-Id: I1ab1bd2e2808d3ff319cc31924e083011ef21fe3
Signed-off-by: Arve Hjønnevåg <arve@android.com>
The lk smp branch changed the gic to have per cpu interrupt handlers
for every interrupt. This is not needed for interrupts that are not
cpu specific.
Change-Id: I71298931ec7b337b11934eac2722be254172976e
This add support for the OpenRISC 1000 architecture, and
as the architecture specification defines an on-chip tick-timer
and interrupt controller, drivers for those are included in
this commit.
Support to utilize the MMU is implemented,
and it can be opted in and out with WITH_KERNEL_VM
