Commit Graph

9 Commits

Author SHA1 Message Date
Carlos Pizano
e7eeca7e65 Conditionally use HSE clock config.
The stm32f7-discovery seems ok with the external xtal.
2015-09-01 16:00:35 -07:00
Travis Geiselbrecht
658639022c [platform][stm32f7xx] add NOR flash driver 2015-08-27 15:49:36 -07:00
Travis Geiselbrecht
3799cc6999 [platform][stm32f7] general cleanup of platform/target code
-fix gpio_config, switch usart1 config to this api, move into target code
-switch to just including platform/stm32.h which gets all of the HAL apis
-redo the interrupt driven rx side of usart to be much simpler and directly
 push into the cbuf without using most of the HAL goo.
-reformat for 4 spaces
2015-08-14 15:33:46 -07:00
Carlos Pizano
bb5f3fd929 [stm32f7] uart rx irq driven prototype 2015-08-14 15:30:43 -07:00
Carlos Pizano
13fb2b7516 finally able to up to 216MHz by switching to HSI 2015-08-14 15:30:43 -07:00
Carlos Pizano
39097a8f39 less hacky usart1 init, but not fixing anything new 2015-08-14 15:30:43 -07:00
Carlos Pizano
0e9613d51c [stm32f7] Enabling the HSI clock to 216 MHz
Although it could be currently to just 69 MHz, which is what
sysclk and hclk are reporting now.

Upping the clock broke the USART code which looks like it had
not configured a clock source, so with that it works again.
2015-08-14 15:30:43 -07:00
Travis Geiselbrecht
867782bb56 WIP STM32F7
add rx side of uart
enable systick at proper speed
2015-07-10 00:52:37 -07:00
Travis Geiselbrecht
94d4d499f7 WIP support for stm32f746g-eval2 board 2015-07-08 02:24:59 -07:00