Commit Graph

733 Commits

Author SHA1 Message Date
Travis Geiselbrecht
d1a332891c [arch][x86] add x2apic mode to the local apic driver
Fill in some more x86 feature bits while at it.
2024-12-17 23:57:56 -08:00
Travis Geiselbrecht
6b89609887 WIP x86-64 SMP: get the 64bit secondaries fully started
Rearrange some of the cpu initialization code to be runnable on each cpu
as they come up. Complete the 64bit bootstrap mechanism and call into C
code.

Makes it as far as trying to reschedule via an IPI. Need to implement
local apic based IPI mechanism.
2024-12-13 00:21:16 -08:00
Travis Geiselbrecht
6538baea70 WIP x86-smp
add uspace mmu support for x86-64
trampoline x86-64 cpus to long mode and into the kernel aspace
2024-12-11 00:19:57 -08:00
Travis Geiselbrecht
1ca821ec54 WIP x86-smp squelch some warnings in no smp mode 2024-12-06 23:44:19 -08:00
Travis Geiselbrecht
1afb5d7a66 WIP x86 smp: start the framework for detecting and starting secondary cores 2024-12-06 23:40:26 -08:00
Travis Geiselbrecht
dbef9ff15d [platform][qemu-m68k] expand the bootinfo parsing code
Break into a separate .c file.
2024-09-07 15:13:20 -07:00
Travis Geiselbrecht
84053e4cde [platform][qemu-virt-arm] move uart initialization first
It should be safe to do this since the uart does not use the gic or
timers. This will allow printing from the gic or timer driver.
2024-08-11 12:16:18 -07:00
Travis Geiselbrecht
80e36e4925 [platform][qemu-arm] switch to using the virtual timer interrupt
On mac qemu, trying to use the physical timer does not seem to work, but
really the virtual timer is what you should be using most of the time,
especially when running under emulation.
2024-08-11 12:01:39 -07:00
Travis Geiselbrecht
e03d4196a3 [platform][halt] refactor the default halt/reboot/shutdown logic
Move common logic into a default routine in platform/power that other
platforms can reuse to implement the general default shutdown logic.
Add helper routines to print the cause.
Refactor the platforms that had substantial halt logic to reuse the
default implementation.
2024-08-09 19:30:20 -07:00
Travis Geiselbrecht
6fd2626359 [dev][uart][pl011] switch configuration to a structure
This should be a bit easier to deal with going forward.
2024-08-09 18:20:30 -07:00
Travis Geiselbrecht
51bcea6525 [dev][uart][pl011] have the uart be data driven
Initialize the uart by passing in the base and irq, as well as a flag
specifying if it's the debug uart and should directly put data into the
console buffer (if present).
2024-08-09 18:05:35 -07:00
Travis Geiselbrecht
5fa540dd31 [dev][uart][pl011] first step moving pl011 driver out of qemu-virt-arm
No real functional change, but move the driver implementation out to a
separate place so it can be made to be platform independent.
2024-08-09 18:05:35 -07:00
Travis Geiselbrecht
d1f4b4a546 [target][banana pi f3] quick n dirty port to the bananapi f3 board
A decent 8 core riscv64 board with dual ethernet and 2 or 4GB ram.

Fairly easy to bring up on, though not a lot of docs at the moment.
2024-06-19 16:43:16 -07:00
Travis Geiselbrecht
2f336c9ba2 [platform][qemu-virt-arm] update the uart driver to use the new mmio routines
This was the driver that triggered the whole thing, since GCC 14.1 was
starting to use more fancier addressing modes that was causing QEMU to
bomb out when using KVM.
2024-05-14 00:01:49 -07:00
Travis Geiselbrecht
3c71b665f6 [platform][arm-qemu] fix issue with uart driver on KVM
The accessing method the compiler is emitting for the *REG32 macros on
arm32 and arm64 is occasionally generating load/stores with writeback.
Though this has worked before, it seems to be rejected with whatever
combination of qemu + linux + hardware on this Raspberry Pi 5.

Convert the register accessors to inline asm that uses basic load/store
instructions, which is really the only correct thing to do now and in
the long run. Add a TODO to move this to reg.h and start to revamp how
registers are accessed across LK, but for now keep it just here to fix
things.
2024-05-10 07:36:29 +00:00
Cody Wong
b29df9194b [fs][v9fs] Add VirtIO 9p filesystem structure
Add the fundamental filesystem structure to attach a VirtualIO 9p
device. With the implementation of VirtIO 9p devices (lk/dev/virtio/9p),
we can use those APIs to connect to a shared folder as a LK filesystem.

Signed-off-by: Cody Wong <codycswong@google.com>
2024-04-25 00:17:02 -07:00
Travis Geiselbrecht
d39f2db58d [platform][device-tree] fix up 3 platforms to use the new fdtwalk routines
Three platforms had basically duplicated logic that just was pulled into
the fdtwalk library. Fix these up to call into those routines instead.

-qemu-virt-arm
-qemu-virt-riscv
-jh7110 (visionfive 2 soc)
2024-04-16 23:15:00 -07:00
Travis Geiselbrecht
03eb343e52 [arch][riscv] add a way for platforms to set optional riscv ISA extensions
A pretty simple mechanism, a list of extensions added to
RISCV_EXTENSION_LIST make variable is expanded to an underscore
delimited string appended to the end of -march=

Pretty simple but it should work for now.
2024-04-07 23:10:31 -07:00
Travis Geiselbrecht
00b06a8302 [arch][riscv] change secondary cpu bootstrap api
Instead of setting a counter of the number of secondaries to start, have
platform or target code pass in a list of harts to start instead. This
allows for there to be discontinuties in the layout of the cpu harts, or
in the case of some sifive based hardware, hart 0 is otherwise offline.
2024-04-07 22:32:49 -07:00
Cody Wong
64b462cb37 [arm][v9p] Add v9p host dir sharing support for arm platform
- Add the v9p support for arm platform.
 - Add an option `-f` to set the shared directory on the host machine to
   `do-qemuarm`.
 - For example, to use the v9p dir sharing, run the script as:
    ```
    # under `lk/` run the follow command will share the current
    # directory `lk/` within LK vm as VirtIO 9p device
    scripts/do-qemuarm -f .
    ```

Signed-off-by: Cody Wong <codycswong@google.com>
2024-04-01 23:09:30 -07:00
Travis Geiselbrecht
ed309d2d7f [platform][pc] use legacy memory descriptor if multiboot doesn't pass new style
Use the legacy version of the memory sizing info that just hands the
kernel 2 implicit ranges: 0 ... X and 1MB ... Y.

Not ideal, but when booting on very old machines without BIOS e820 call
implemented it's all you got.
2024-03-07 23:35:58 -08:00
Travis Geiselbrecht
406f28a3ea [platform][rp2040] Update the pico platform after updating the SDK
The build was momentarily broken until this was added to fix it.

Also generally remove a few extraneous defines in the platform code.
2024-02-27 00:35:23 -08:00
Travis Geiselbrecht
5249549e12 [platform][rosco_m68k] update the duart driver
-Reinitialize the uart bit modes
-Ignore framing/break errors on receive. Unclear why they seem to always
be set in the fifo, but seems to be safe to ignore for now
-Make sure platform_pgetc returns the right error code
-Initialize the output ports to all gpios
2024-02-11 01:28:49 -08:00
Travis Geiselbrecht
d9b7d070c9 [top] add header declaration for lk_boot_args
Update users of the boot args array to use the header.
2024-02-11 00:38:09 -08:00
Travis Geiselbrecht
58fd2c36d5 [platform][jh7110] Tweak logic to find the FDT from the uimage 2023-10-15 14:41:30 -07:00
Alex Richardson
496e2f4b8c [riscv][clang] Use a CSR name instead of a numeric expression
Clang's assembler rejects expressions containing e.g. (1u << N) in the
assembler. Instead using numeric expressions for per-privilege level
CSRs, we can prepend `m` or `s`. This also lets the compiler assign the
CSR encoding instead of having to hardcode it in the source code.
2023-06-08 07:08:49 -07:00
Travis Geiselbrecht
957b9033fb [scripts][python] Move a few more scripts from python2 to python3
Turns out they were already python3 safe, so just switch to requested
version over.
2023-06-01 12:17:37 -07:00
Travis Geiselbrecht
a1eb850079 [target][visionfive2] set the time base properly
Seems to be running at 4Mhz according to the device tree.
2023-03-09 23:20:18 -08:00
Travis Geiselbrecht
7c2c8d8e56 [dev][interrupt][riscv_plic] merge now 3 implementations of the same plic driver into one
Move a copy of the PLIC driver out of one of the platforms and make the
setup of the interrupt controller a bit more dynamic.
2023-03-09 23:09:32 -08:00
Travis Geiselbrecht
c66ad44efa WIP [target][visionfive2] Add initial support for a VisionFive 2 RISC-V board
Still TODO:
-Set the timer rate properly
-Fix nonzero based hart secondary cpu boot
-Try to parse the device tree for some information
2023-03-06 01:06:27 -08:00
Travis Geiselbrecht
91d0a5f7d1 [lib][fdtwalk] add routine to find and parse /reserved-memory node
Add logic to the riscv virt platform to properly mark off memory
claimed by OpenSBI.
2022-12-17 17:12:35 -08:00
Travis Geiselbrecht
2d561b4fcf [platform][qemu-virt-riscv] seems the first 512K are now used by opensbi 1.1
Looks like this is described in /reserved_memory/mmode_resv@<address> as
patched by opensbi on top of the existing qemu provided dtb.

Future patch should parse this instead of hard coding it.
2022-12-17 00:57:37 -08:00
Travis Geiselbrecht
bcfad25587 [arch][x86][mmu] update how mmu code accesses physical pages
Move the mmu_initial_mapping from platform into arch/x86. For this
architecture the default mappings are basically hard coded in arch/x86
anyway, so move ownership of this data there, closer to where it's
actually initialized.
Update the 32 and 64bit paging code to properly use the paddr_to_kvaddr
and vice versa routines.
Update to allocate page tables directly from the pmm instead of the heap
(on 32bit code).
2022-11-02 23:48:49 -07:00
Travis Geiselbrecht
0d0568612a [lib][acpi_lite] update to use the VMM to map acpi tables in
The old method assumed that all of the tables were mapped within the
kmap area of the kernel. This basically works on 64bit machines but on a
32bit x86 its entirely likely the ACPI tables are at higher physical
addresses that can be reached, which is currently limited to 1GB.

By using the VM it means it can individually map the headers and each
individual table.
2022-11-02 21:44:15 -07:00
Travis Geiselbrecht
2367686854 [make] add a way for a module to opt into additional warnings
Move -Wmissing-declarations and -Wmissing-prototypes into this bucket.
Opt in most of the core top level modules in the system. More to follow.
2022-10-23 23:16:48 -07:00
Pedro Falcato
165f826ca3 [platform] [riscv-virt] Fix PLIC_PRIORITY macro
Old PLIC_PRIORITY macro had an off-by-one bug, causing you to set the
priority for the wrong IRQ.
2022-09-28 19:36:13 -07:00
Michael Bishop
f4b2fa9a6b [dev][power][psci] refactor out of the qemu-virt-arm module 2022-09-25 18:14:50 -07:00
Travis Geiselbrecht
c44c6ed86e Merge from luka177:f4-update
Update the stm32f4xx ST peripheral libraries.
2022-08-14 19:07:35 -07:00
Travis Geiselbrecht
f2cf99bf73 [platform][stm32f4xx] append the necessary #define to GLOBAL_COMPILEFLAGS
GLOBAL_CFLAGS will only work for .c files, which breaks on the first
inclusion of the headers by a .cpp file. *_COMPILEFLAGS is for all
language types (C, asm, C++)
2022-08-14 19:05:20 -07:00
Travis Geiselbrecht
62e2e7dba0 [platform][pc] move the multiboot header into generic space
Share the header with arch/x86 code
Clean up the use of the boot flags
Add code to print the framebuffer information, if present
2022-08-07 23:04:23 -07:00
Travis Geiselbrecht
8643334914 [platform][pc] update the multiboot memory detection code
Parse up to 16 pmm arenas from the multiboot memory data structure. Roll
the 32bit code to properly trim at 1GB as before, but using new logic.
Remove conditional checks on WITH_KERNEL_VM in x86 code, which only
really compiles with the mmu and the vm on.
2022-08-07 16:28:03 -07:00
Travis Geiselbrecht
497c52115b [platform][rosco-m68k] microoptimize the duart irq 2022-08-06 17:55:35 -07:00
Travis Geiselbrecht
b8de922781 [platform][rosco-m68k] delete some unused #defines 2022-08-06 17:41:12 -07:00
Travis Geiselbrecht
c3ea652c1f [platform][qemu-virt-m68k] fix timer interrupts
The IRQ calculation for the virtio range was off by 8, which caused the
virtio code to override the interrupt registration for the RTC, which
caused it to stop firing. Clean up the #defines that define irq mappings
to fix this issue.
2022-08-06 17:28:12 -07:00
Travis Geiselbrecht
c429ffcc7a [arch][x86] add more comprehensive feature bit routine
Cache copies of the first few cpuid leaves from each bank at bootup if
present. Add a fast routine to test feature bits out of this array.
2022-07-24 16:59:45 -07:00
Travis Geiselbrecht
cd96c43006 [make] define and undefine some make variables
Based on building with --warn-undefined-variables, find a few places in
the build system where undefined variables were used incorrectly, or
never set due to unused code.
2022-07-22 23:45:42 -07:00
luka177
17a2af5ceb [platform-stm32f4xx] Updata chip defenition 2022-07-21 19:19:31 +03:00
Travis Geiselbrecht
095aca80f1 [arch][riscv][sbi] add the pmu extension, tweak boot messages, qemu-virt use reset calls 2022-05-29 14:48:04 -07:00
Travis Geiselbrecht
d496ca1902 [platform][rosco-m68k] add proper support for the system data block
A block of data left behind by the firmware to tell the system important
things such as the size of memory.
2022-05-21 17:26:49 -07:00
Peter Collingbourne
4a15661ee0 [arch][arm64] use SMC when booted at EL2 in QEMU
If we were booted at EL2 (e.g. when passing -machine
virt,virtualization=on), we need to use SMC instead of HVC for PSCI
calls. Change psci_call() to do this and add a flag to do-qemuarm to
allow testing this scenario.
2022-04-19 18:32:12 -07:00