In legacy builds it's possible to boot on a cpu that doesn't appear to
have CR4 implemented (Am586 to be precise), but there's no features
needed to set, so it seems that this was architecturally okay.
32 and 64 bit:
- For now SMAP causes the mmu unit tests to fail, so disable.
- Make sure CR4.PGE is set if present.
- Make sure the rest of the system knows that user aspaces are available
on 32bit.
- Skip cpus in the MADT table that are not enabled
- Bump count to 16 cpus
- Move the spurious interrupt vector to 0xff since it needs to end in
0xf on <=P6.
- Fix an assert in local apic code when not using x2apic and starting
secondaries.
- Follow the spec a bit closer and wait up till a second for each
secondary core to start.
-Move the local apic driver to arch/x86
-Add routines to send IPIs between cpus
Something is unstable at the moment and the system crashes after a while
with random corruptions when using SMP.
Extend the PIT driver to allow for one shot timers even though it
monotonically runs a 1kHz tick. This allows it to keep time and provide
one shot events, though only at 1ms resolution.
Rearrange some of the cpu initialization code to be runnable on each cpu
as they come up. Complete the 64bit bootstrap mechanism and call into C
code.
Makes it as far as trying to reschedule via an IPI. Need to implement
local apic based IPI mechanism.
It's getting too hard to maintain a single layout that works with both,
so go ahead and split it. Also redo the layout so it should be usable
with user space and syscall and sysenter instructions from either mode.
I hadn't noticed this before, but you can directly reference a global
variable in a load/store in assembly, which combines a lla + ld/sd into
a 2 instruction pair instead of 3 due to the 12 bit offset provided in
the load/store.
This fixes a problem if the text segment gets larger than ~1MB where the
raw jal instruction cannot reach. Using 'call' or 'tail' allows the
assembler to emit a 2 instruction sequence that the linker later
relaxes if it can.
When dropping from EL2 (or EL3), load vmpidr_el2 and vpidr_el2 with the
correct values to make sure EL1 sees the 'real' mpidr_el1 and midr_el1.
Though in most cases they're already configured by whatever firmware ran
before, there's no actual guarantee that it is, and it may be full of
random garbage.
This change introduces $LK_ROOT/toolchain as an official installation
directory for toolchains, as well as a new script for conveniently
installing them there (versus manual GETs + untarring).
getting_started.md is updated to suggest its use.
