Commit Graph

25 Commits

Author SHA1 Message Date
Travis Geiselbrecht
5a520eca3e [arch][x86] start getting inter-processor-interrupts working
-Move the local apic driver to arch/x86
-Add routines to send IPIs between cpus

Something is unstable at the moment and the system crashes after a while
with random corruptions when using SMP.
2025-04-01 00:40:50 -07:00
Travis Geiselbrecht
6b89609887 WIP x86-64 SMP: get the 64bit secondaries fully started
Rearrange some of the cpu initialization code to be runnable on each cpu
as they come up. Complete the 64bit bootstrap mechanism and call into C
code.

Makes it as far as trying to reschedule via an IPI. Need to implement
local apic based IPI mechanism.
2024-12-13 00:21:16 -08:00
Travis Geiselbrecht
181796e843 WIP x86 get x86-32 working with a per-cpu gs: segment register for the kernel 2024-12-06 22:30:48 -08:00
Travis Geiselbrecht
fd79fccdde WIP x86 SMP 2024-12-06 00:03:48 -08:00
Travis Geiselbrecht
77eb84d152 [arch][x86] a few little tweaks while looking at some older code 2024-11-27 21:34:05 -08:00
Travis Geiselbrecht
bcfad25587 [arch][x86][mmu] update how mmu code accesses physical pages
Move the mmu_initial_mapping from platform into arch/x86. For this
architecture the default mappings are basically hard coded in arch/x86
anyway, so move ownership of this data there, closer to where it's
actually initialized.
Update the 32 and 64bit paging code to properly use the paddr_to_kvaddr
and vice versa routines.
Update to allocate page tables directly from the pmm instead of the heap
(on 32bit code).
2022-11-02 23:48:49 -07:00
Travis Geiselbrecht
77d8622268 [arch][x86] clean up a bit of the cpuid detection
Save the model/family information in a new structure.
Move the printing portion of the detection to the arch_init runtime
so it gets a chance to print after the uart is initialized.
2022-10-19 20:03:49 -07:00
Travis Geiselbrecht
62e2e7dba0 [platform][pc] move the multiboot header into generic space
Share the header with arch/x86 code
Clean up the use of the boot flags
Add code to print the framebuffer information, if present
2022-08-07 23:04:23 -07:00
Travis Geiselbrecht
7505c3087a [arch][x86][fpu] spiff up the fpu code to detect things more cleanly
Doesn't really change the functionality of the code except it'll try to
work with less fpu features present.
2022-07-24 19:56:24 -07:00
Travis Geiselbrecht
18330c5948 [arch][x86] start of cpu detection and feature detection 2022-01-09 18:20:14 -08:00
Travis Geiselbrecht
cba9e47987 [license] replace the longer full MIT license with a shorter one
Used scripts/replacelic. Everything seems to build fine.
2019-07-05 17:22:23 -07:00
Travis Geiselbrecht
d8fa82cb91 [formatting] run everything through codestyle
Almost nothing changes here except moving braces to the same line as the
function declaration. Everything else is largely whitespace changes and
a few dangling files with tab indents.

See scripts/codestyle
2019-06-19 21:02:24 -07:00
Travis Geiselbrecht
1b7a28efb8 [include][lk] fixup lk/ include path move 2019-06-19 19:46:11 -07:00
Travis Geiselbrecht
ee672a5471 [arch][x86] flatten x86-64 and x86 into a single tree of code
Major refactor of x86 code into a single arch.
Also bump both 32 and 64 bit to running the kernel at a 'high' address.
2016-02-29 12:42:45 -08:00
Zhu, Bing
b6647f5bef [arch][x86][fpu]Change naming convention for FPU flag
To align with lk/arm flag naming convention, FPU flag
ENABLE_FPU is changed to X86_WITH_FPU

Signed-off-by: Zhu, Bing <bing.zhu@intel.com>
2015-11-09 22:14:11 +08:00
Travis Geiselbrecht
853c436ea3 [arch][x86] mass-reformat to space indents on all the x86 and x86-64 files
used scripts/codestyle.space
2015-11-06 19:32:51 -08:00
yu-cheng yu
0400a04945 [arch][x86] This is floating point support for intel x86 and x86-64.
Change-Id: Id0b0e2b69c1d27832eb656935e944c04681b324a
2015-10-27 13:04:45 -07:00
Shreyas Nagaraj
57a08b7f65 [arch] [x86] - changes to MMU for x86, x86-64 and x86-PAE
fixing bugs in page table mgmt and overall MMU code clean-up

Signed-off by: Shreyas Nagaraj <shreyas.nagaraj@intel.com>
2015-07-01 00:36:12 -04:00
Sergio Rodriguez
8b78376b6b adding paging support for x86 2015-06-11 12:05:12 -07:00
Travis Geiselbrecht
ee9d2927ad [arm] add ability to pass and generically read up to 4 boot args from whoever loaded lk
-Extend arch_chain_load() to pass 4 args
2014-11-21 15:50:18 -08:00
Travis Geiselbrecht
ec69757a59 [arch] relocate binary to proper physical location at boot, add arch_chain_load
-in arm start.S, calculate and move the current binary to the proper physical
location before enabling the mmu.
-add arch_chain_load which does the necessary translations from virtual to
physical, tries to gracefully shut the system down, and branches into the loaded binary.
2014-08-12 16:21:27 -07:00
Travis Geiselbrecht
8d89c952b4 [arch] rearrange ops.h
-have the top level ops.h declare static routines
-arch specific ops.h can override with inlines or pass the
call through to hard implementation routines.
2012-12-27 18:35:55 -08:00
Travis Geiselbrecht
5c1df88168 [arch] run astyle on arch/ 2012-10-31 21:52:16 -07:00
Travis Geiselbrecht
2d23d7f9e3 [arch] factor out the debug_cycle_count to arch specific code 2009-06-28 12:48:18 -07:00
Corey Tabaka
d4427fa54c Initial x86 port 2009-04-24 11:14:38 -07:00