Commit Graph

35 Commits

Author SHA1 Message Date
Travis Geiselbrecht
445f3e4ee7 [platform/target][warnings] fix -Wmissing-declarations warnings in platform/ and target/
Mostly driver code in various platforms. There are still some warnings
in this part of the tree in lesser-used platforms.
2021-10-21 23:18:09 -07:00
Travis Geiselbrecht
cba9e47987 [license] replace the longer full MIT license with a shorter one
Used scripts/replacelic. Everything seems to build fine.
2019-07-05 17:22:23 -07:00
Travis Geiselbrecht
d8fa82cb91 [formatting] run everything through codestyle
Almost nothing changes here except moving braces to the same line as the
function declaration. Everything else is largely whitespace changes and
a few dangling files with tab indents.

See scripts/codestyle
2019-06-19 21:02:24 -07:00
Travis Geiselbrecht
2eb32a4369 [style] mass reformat all the non external code to 4 space indents
Ran everything through scripts/codestyle.space, which uses astyle
to generally follow K&R style.

Biggest non whitespace change is pulling brackets down on function
declarations, which I'm pretty ambivalent about, but astyle insists
on taking a stance
2016-02-14 12:24:01 -08:00
Travis Geiselbrecht
3b2d7a268b [make] remove the need for a module to manually add $(LOCAL_DIR)/include to the global include path
Pretty much every module in the system was already doing it, so do it
automatically.
2015-10-19 19:07:16 -07:00
John Grossman
c2b645ef8a [zynq][gpio] Fix a collection of bugs with the GPIO driver.
+ When setting GPIOs, the MASK_DATA registers are used.  Code was
  properly computing which register to use based on register index
  (either LSW or MSW), but was improperly computing the mask/value to
  set when the GPIO to be manipulated existed in the upper 16 bits
  (the shift needed to be offset by 16 bits and was not).
+ Do not manipulate things like the IO driver type, drive speed, and
  so on when enabling/disabling the pullup in the SLCR registers.
  Previously, whenever a GPIO was being configured, the SLCR register
  was being set to be 1.8v LVCMOS, and having the DISABLE RCV bit set.
  Things like the IO type have been set by the platform and should not
  be manipulated by the GPIO driver.  Now, the GPIO code leaves those
  bits the way they were configured, and changes only the PULLUP bit
  as well as the 4 levels mux bits (arguably, it should not even
  change the mux bits; it is the platform's job to properly mux the
  pins).
+ Address an issue with the subtle (undocumented) difference between
  the DIRM and the OEN bits when configuring for input vs. output.
  Please read the extensive comment in the code for details.

Change-Id: I160069eeef92b1cf0763274ccb64c5d14744f563
Signed-off-by: John Grossman <johngro@google.com>
2015-05-19 10:21:33 -07:00
Travis Geiselbrecht
580a83d74f [lib][minip] have the pktbuffers automatically allocated at startup
Default number of buffers are 128, can be overridden with a #define.
2015-05-02 22:48:57 -07:00
Christopher Anderson
6ef986679a [uzed] Set up pktbufs similarly to zybo 2015-04-23 13:30:39 -07:00
Christopher Anderson
4a038ceef6 [zynq] Add support for GPIO interrupts 2015-04-23 13:30:39 -07:00
Christopher Anderson
fdecb22f2e [zybo] Set yellow LED to debug led 2015-04-23 13:30:39 -07:00
Christopher Anderson
d352ac1d2b [gem][minip][pktbuf] Improvements for TX scatter gather functionality
- GEM now supports asynchronous scatter-gather queuing and properly handling
  pktbuf ownership
- General stack cleanups in Minip
- pktbufs now grab buffers from the user, or from a preallocated pool
2015-04-23 13:30:39 -07:00
Travis Geiselbrecht
bab2e8ccf5 [target][zybo] zybo has 512MB ram 2015-04-19 01:34:18 -07:00
Christopher Anderson
ffbb7b8fd3 [zynq] Add MIO_DEFAULT and correctly ignore MIO configuration based on that rather than 0 2015-04-02 11:03:55 -07:00
Chris Anderson
5ed4eca1ba [zynq] Add slcr commands and pull out DDR config 2014-11-21 10:37:00 -08:00
Chris Anderson
a112873487 [zynq][gem] Move uzed and zybo gem inits to target 2014-10-10 14:56:38 -07:00
Chris Anderson
3e6334670f [zynq][gem] Move MIO cfg in the gem driver to the target cfg 2014-10-10 13:39:09 -07:00
Chris Anderson
e060c035d1 [zynq] Remove generated init for Zybo, add platform init routines 2014-08-27 11:48:18 -07:00
Travis Geiselbrecht
81dbfc2493 [platform][zynq] add support for putting the base of the system in dram (1MB offset)
-Add a few global #defines: ZYNQ_CODE_IN_SDRAM and ZYNQ_SDRAM_INIT which
are used in a few places to initialize or not initialze dram and affect
the way the VM is brought up.
-Add zybo-dram-test project
2014-08-13 17:28:47 -07:00
Brian Swetland
df26d050b9 [target][zybo] factor shared code into an app
Some but not all zybo based projects will want to share some higher
level initialization code, so move that to app/zybo-common and make
the zybo target a bit more bare-bones.
2014-08-08 15:20:30 -07:00
Brian Swetland
070fb64dfd [target][zybo] create bootloader patition if it doesn't exist 2014-08-05 18:16:11 -07:00
Travis Geiselbrecht
73b8ddbfb2 [target][zybo] add net0.use_dhcp flag to force dhcp even if ip address is set 2014-08-04 17:48:30 -07:00
Chris Anderson
98a09511e9 [zynq] Convert clk/mio jam table to readable code
Also re-added the generated pll table for documentation purposes
2014-08-04 15:54:25 -07:00
Chris Anderson
8599667a79 [zynq] Document IO PLL 2014-07-31 15:40:10 -07:00
Chris Anderson
2b4c03e80e [zynq] Convert the Zynq PLL init jam table into readable code
End goal will be to convert all the functions and remove ps7 entirely.
2014-07-31 15:37:03 -07:00
Chris Anderson
4a3ac17349 [gem]/[minip] mac and console changes
+ Add gem_set_macaddr
+ Disable promiscuous mode
+ Change flood command to raw
+ Change gem's console command from 'g' to 'gem'
+ Add status commands for both minip and gem
2014-07-31 01:24:40 -07:00
Travis Geiselbrecht
646070cd7f [target][zybo] read mac address and ip addresses from sysparams, if present
If the mac address isn't present, make up a random local one.
2014-07-26 20:54:34 -07:00
Chris Anderson
f3f4be5a8c [target][zybo] init minip 2014-07-24 17:53:37 -07:00
Travis Geiselbrecht
503f30f685 Merge remote-tracking branch 'github/vm'
Conflicts:
	platform/vexpress-a9/include/platform/vexpress-a9.h
	platform/zynq/rules.mk
2014-07-24 01:29:43 -07:00
Travis Geiselbrecht
4e5cb161a5 [target][zybo] add sysparam and ptable support
Add some code in target init that sets up the spi flash ptable
and sysparam block.
2014-07-23 15:22:12 -07:00
Travis Geiselbrecht
bcebb0861a [platform][zynq] refactor qspi into two layers 2014-07-15 20:09:08 -07:00
Travis Geiselbrecht
184cac4a0f [platform] add zybo and vexpress-a9 support for the VM 2014-07-11 18:11:59 -07:00
Travis Geiselbrecht
bdb5addd5b [platform][zynq] initial implementation of some clock routines
-Mostly introspection at this point
-Move target specific jam table to early platform init
2014-05-29 18:24:55 -07:00
Travis Geiselbrecht
a69f397e06 [target][zybo] set the heap to the base of dram that's not covered with sram 2014-05-02 22:30:22 -07:00
Travis Geiselbrecht
1930cb3abd [platform][zynq] update timer code to take tick from target 2014-05-02 20:21:10 -07:00
Travis Geiselbrecht
e5a4b14bed [target][zybo] add initial port to zybo board 2014-04-20 23:53:13 -07:00