Commit Graph

2434 Commits

Author SHA1 Message Date
Travis Geiselbrecht
c997cfbc48 [kernel][mutex] Add a default timeout to the C++ wrapper mutex 2022-04-22 20:27:23 -07:00
Travis Geiselbrecht
1191f3a601 [lib][fat] restructure directory code
Move the directory handling code to dir.cpp
Handle walking the entire directory structure
Make file open be a much simpler function that just calls dir routines

TODO:
properly deal with FAT16 and FAT12 root directories
remove runtime mallocs in dir routines
2022-04-22 00:46:44 -07:00
Travis Geiselbrecht
b300a95ab4 [fs][fat] split the logic into more files, change fat detection logic
Generally split the driver into more files for future expansion.
Follow the FAT spec more closely to determine FAT type.
2022-04-21 23:06:18 -07:00
Travis Geiselbrecht
3229494b3b [fs][fat] rename from fat32 to simply fat
It also handles fat16 and (soon) fat12.
2022-04-21 21:37:34 -07:00
Travis Geiselbrecht
d7ef1985eb [scrtipts][do-qemu] align the arm and x86 script a bit more
Add option to specify disk file to ARM
2022-04-21 21:31:01 -07:00
Travis Geiselbrecht
fe2a370171 [fs][fat] general C++ificatition of the code and a bit of cleanup 2022-04-21 21:31:01 -07:00
Peter Collingbourne
4a15661ee0 [arch][arm64] use SMC when booted at EL2 in QEMU
If we were booted at EL2 (e.g. when passing -machine
virt,virtualization=on), we need to use SMC instead of HVC for PSCI
calls. Change psci_call() to do this and add a flag to do-qemuarm to
allow testing this scenario.
2022-04-19 18:32:12 -07:00
Peter Collingbourne
894a580b5f [top] use incomplete array declarations for constructor symbols
Clang will omit the initial comparison in this while loop on the
assumption that two different variables will not have the same address,
which will lead to a crash if the kernel has no constructors.

It will, however, retain the comparison for incomplete arrays
because they may have zero size (and therefore may alias with another
variable). Therefore, change the declarations of the start/end symbols
for the constructor list to incomplete arrays.
2022-04-19 18:29:02 -07:00
Travis Geiselbrecht
d829ad24ef [fs][fat] fix up the mount and read logic in fat32
Now seems to be capable of mounting a simple fat32 volume and
successfully reading a single file in the root directory that spans a
few 512 byte clusters.
2022-04-19 00:02:23 -07:00
Travis Geiselbrecht
d4969ccb3c [fs][fat32] trivially convert to C++ 2022-04-18 22:24:27 -07:00
Travis Geiselbrecht
fdb027fe7b [lib][bcache] add C++ header guards 2022-04-18 22:24:02 -07:00
Travis Geiselbrecht
c7bef34590 [lib][fs] fix path parsing bug
If two mount points had similar names but one was longer, the path
matching logic would be triggered on the shorter name.

ie, /foo and /foo2 were illegal, since /foo2 path matching would match
against /foo. Tighten the logic a bit to match against the matching
element of the passed in path.

Note: heirarchial path matching still works, so /foo/bar/baz will match
against a mount point at /foo/bar. Debatable if heirarchial mount points
should work at the moment with this simple logic, but it's there for
now.
2022-04-18 21:32:57 -07:00
Travis Geiselbrecht
b88d9e5df5 [lib][fs] add path normalization tests, add few shell commands
Move the test normalization routine into a separate test file.
Add shell commands to list registered file systems and mount points.
2022-04-18 21:04:51 -07:00
Travis Geiselbrecht
8cdd71ab00 [platform][rosco-m68k] default to WITH_LINKER_GC on 2022-04-18 01:15:45 -07:00
Travis Geiselbrecht
479d989185 [make] default WITH_LINKER_GC to false at the place it is used
Also switch the test logic to the TOBOOL macro.
2022-04-18 01:15:45 -07:00
Travis Geiselbrecht
9d1802fa2c [platform][rosco-m68k] change the tick rate to 100Hz
1000kHz is probably a bit much for this board.
2022-04-18 00:48:50 -07:00
Travis Geiselbrecht
54fd2c3e35 [app][mem_test] print the range before starting the test 2022-04-18 00:45:07 -07:00
Travis Geiselbrecht
8028512833 [arch][m68k] add more switches for cpu models 2022-04-12 17:26:33 -07:00
Travis Geiselbrecht
49644a2c39 [platform][rosco-m68k] Add port to the Rosco M68k board
Port to the really neat 68010 based board at https://rosco-m68k.com/

Port Features:
-10Mhz 68010
-1MB ram
-Dual UART + timer implemented as a 68c681 chip
-timer running at 1Khz, UART A for console
-interrupt driven RX support

Some amount of extending of the 68k exceptinon code was needed to
support the autovectored irqs that the 68681 uart uses. Added build
system support for 68010.
2022-04-12 00:25:12 -07:00
Peter Collingbourne
bce9599d80 [arch][arm64] disable EL1 FPU traps even when starting at EL1
It is possible for early initialization functions such as lk_main()
to contain NEON instructions because we don't build the kernel with
-mgeneral-regs-only. As a result we can end up taking an FPU exception
before we are ready to handle it.

We didn't have this problem when starting at a higher exception level
than EL1 because we turned off FPU traps in arm64_elX_to_el1(). But we
neglected to do so when starting at EL1. Fix the problem by moving the
CPACR_EL1 manipulation out of arm64_elX_to_el1() and into arm_reset().
2022-03-30 11:04:11 -07:00
Travis Geiselbrecht
6ad3643165 [lib][minip] add an arg to the ethernet transmit callback
Already had the registration hook for it, but was never used.
2022-03-19 15:06:57 -07:00
Travis Geiselbrecht
fe28bd8a95 [lib][minip] add a mechanism to wait for the stack to be configured
Configured in this case means an ip address assigned and a nic
installed.
2022-03-19 14:46:01 -07:00
Travis Geiselbrecht
9caf62273c [lib][minip] start of TCP connect state machine
A few miscellaneous tweaks outside of that.
2022-03-19 14:43:55 -07:00
Travis Geiselbrecht
dc09bac586 [lib][elf] tweak to a printf to be more useful 2022-03-13 13:49:28 -07:00
Travis Geiselbrecht
ce9f4f6db2 [arch][riscv] using a new trick utilize real instructions to zero fpu state
Previously was hard coding the instructions to work around a limitation
of the assembler that did not allow using fpu instructions when the code
was being compiled without support. Move the zeroing routine into a
separate assembly file and override the architure at the top.
2022-03-12 17:39:00 -08:00
Travis Geiselbrecht
4bd6de50b0 [scripts][do-qemux86] add a few more virtio devices and tweaks 2022-02-27 19:37:48 -08:00
Travis Geiselbrecht
e555db5bda [bus][pci] at least register that MSIX is available
Doesn't yet have support for it, but set the bool and remember it was
present when scanning devices.
2022-02-27 19:36:59 -08:00
Pedro Falcato
a9a631152f [fdtwalk] Fix a bug in #address-cells parsing
Fixes issue #314
2022-02-13 14:00:22 -08:00
Travis Geiselbrecht
cc21c06eb6 [platform][m68k-virt] parse the BOOTINFO structure qemu uses to pass info
Pull out the memory size of the system and use it to initialize the
novm.
2022-02-11 00:37:51 -08:00
Travis Geiselbrecht
8ed7d0fc70 [scripts][make-parallel] add uname cases for netbsd and openbsd as well 2022-02-10 22:48:14 -08:00
Travis Geiselbrecht
3db7e86b59 [arch][arm64] save the boot arg registers (x0-x3) in a temporary spot in the boot path
Much of the start.S path avoids using these registers up until now to
avoid trashing any state, but its getting fairly difficult and error
prone to keep this up. Save the args as soon as its known that its the
boot cpu in a temporary place prior to calling lk_main. Wastes 32 bytes
of memory but should be more solid.
2022-02-10 22:34:02 -08:00
Travis Geiselbrecht
e2cda72095 [arch][arm64] tweak the arm64_elX_to_el1 routine to avoid using x0-x3
It's called immediately upon entering the kernel entry vector, prior
to knowing if it's the boot cpu or needing to save any boot arguments,
so avoid using these registers
2022-02-10 22:34:02 -08:00
Wencheng Yang
fbb838d1f8 [arch][x86] left shift 32 bits rather 31 bits to construct msr value 2022-02-09 12:22:30 -08:00
Travis Geiselbrecht
979cebecf2 [bus][pci] Make sure there's a fallback range in release mode 2022-02-06 20:50:24 -08:00
Travis Geiselbrecht
f1431b81d0 [bus][pci] Support for dynamically assigning BARs and bridges if needed
In the case of platforms where a bios or firmware has not already
assigned all the resources, do so. Requires the platform supply one or
more ranges of physical address space and IO that can be mapped into
BARs.

Handles iterating through bridges, computing the sizes of all the
peripherals downstream and rolling that up as well.
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
36e73e0fac [bus][pci] add routines to pass in PCI bus resources prior to starting the pci bus manager
Wire them up on arm and riscv which need them. x86-pc does not, so dont
call it.

Also fix a few miscellaneous bugs, notably PCI not detecting 64bit bars
properly due to an off by one bit error.
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
06ab680159 [lib][fdtwalk] add support to return the io/mmio pci aperture as well
FDT encodes the range of available mmio and io ports that the PCI bus
can use to map bars. Return this information out of the FDT walker
helper routines to feed into the PCI bus manager in the future.
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
d5f394859d [bus][pci] first stab at assigning bus numbers to unconfigured bridges
Had to rearrange the proble logic somewhat, but now the bus manager will
assign consequtive bus numbers as it finds bridges and recursively
drills down to discover the entire bus structure.

Does not assign resources yet, but need to do this in the first pass
to find all of the devices before can figure out how much space they
occupy.
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
ba21aa9236 [bus][pci] quick hack to not dive into bridges that appear unconfigured
This fixes an infinite recursion where it was stepped into bridge a
bridge that has the secondary bus set to 0, which caused it to start
over and probe bus 0 until it blew the stack.

Better fix is to actually assign busses.
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
07f847e38a [bus][pci] add accessors for bridge ranges and print on dump 2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
95443413e8 [bus][pci] break the bus manager file into separate cpp files per object
No functional change aside from rearranging things.
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
5e92f0adf7 [bus][pci] move the bus manager code into a subdir 2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
ef8d252a8a [bus][pci] load BARs for bridges as well
Dump them in the pci dump
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
ef67d619a5 [bus][pci] load bars for devices even if their address is 0
Probe the size first, and if that turns up anything, mark the bar as
valid, even if the address is set to 0. The address can be configured in
a later pass of the bus manager.

Also print the bars on boot.
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
2ab1af0bf3 [bus][pci] add a virtual module that references all the pci drivers
Not sure if this is the right way to go forward, but it at least keeps
from having to copy/paste the same module list in a few different
places.
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
91d5c67fc2 [platform][qemu-virt] make sure the PCI bus builds properly
Implement stubbed out versions of the msi allocation routines.

Add a stubbed out routine to allocate MSI vectors.
2022-02-06 19:46:05 -08:00
Travis Geiselbrecht
0679f91b9a [dev][net][e1000] only build with platforms with the VM enabled 2022-02-06 16:30:47 -08:00
Travis Geiselbrecht
2205aa54dc [dev][e1000] fail to start if the pci bars have not been configured 2022-02-06 15:58:28 -08:00
thomas
a7d2752b28 [kernel][vm] try the next arena if current is out of free pages 2022-01-26 12:16:53 -08:00
Travis Geiselbrecht
278c551821 [dev][pci] read and cache BAR sizes at probe time
Since probing the size of a BAR requires writing and reading back from
the address field, do it at probe time and cache the data instead of at
api time. This should avoid fouling up any mmio transactions in flight.
2022-01-11 01:24:17 -08:00