GLOBAL_CFLAGS will only work for .c files, which breaks on the first
inclusion of the headers by a .cpp file. *_COMPILEFLAGS is for all
language types (C, asm, C++)
Parse up to 16 pmm arenas from the multiboot memory data structure. Roll
the 32bit code to properly trim at 1GB as before, but using new logic.
Remove conditional checks on WITH_KERNEL_VM in x86 code, which only
really compiles with the mmu and the vm on.
The IRQ calculation for the virtio range was off by 8, which caused the
virtio code to override the interrupt registration for the RTC, which
caused it to stop firing. Clean up the #defines that define irq mappings
to fix this issue.
Based on building with --warn-undefined-variables, find a few places in
the build system where undefined variables were used incorrectly, or
never set due to unused code.
If we were booted at EL2 (e.g. when passing -machine
virt,virtualization=on), we need to use SMC instead of HVC for PSCI
calls. Change psci_call() to do this and add a flag to do-qemuarm to
allow testing this scenario.
Port to the really neat 68010 based board at https://rosco-m68k.com/
Port Features:
-10Mhz 68010
-1MB ram
-Dual UART + timer implemented as a 68c681 chip
-timer running at 1Khz, UART A for console
-interrupt driven RX support
Some amount of extending of the 68k exceptinon code was needed to
support the autovectored irqs that the 68681 uart uses. Added build
system support for 68010.
In the case of platforms where a bios or firmware has not already
assigned all the resources, do so. Requires the platform supply one or
more ranges of physical address space and IO that can be mapped into
BARs.
Handles iterating through bridges, computing the sizes of all the
peripherals downstream and rolling that up as well.
Wire them up on arm and riscv which need them. x86-pc does not, so dont
call it.
Also fix a few miscellaneous bugs, notably PCI not detecting 64bit bars
properly due to an off by one bit error.
FDT encodes the range of available mmio and io ports that the PCI bus
can use to map bars. Return this information out of the FDT walker
helper routines to feed into the PCI bus manager in the future.
-Add a bus manager level, which is an object oriented walk of the pci
busses to build a per device object for later manipulation.
-Add features to enable MSI interrupts.
-Extend generic interrupt api to allow the platform to allocate vectors
for MSI interrupts.
-Rearrange a bit of the pc platform for the platform api changes.
-Add PC platform support for using the local apic to EOI MSI vectors.
-Fix up a few existing PCI drivers for small API changes.
-Add a few stubbed out routines for non PC platforms that use PCI.
Uses the QEMU virt machine for 68k defined in qemu 6.0+.
Basic support that boots, prints to the console, takes input from
console, and context switches.
TODO: interrupt support, timer support.
Add build system support for at least being aware of the FPU on
the architecture, not building code to use it.
At the moment, only sets up the FPU into Initial state prior to
entering user space and then ignores it.
Up until now the bottom part of ram has been identity mapped, left over
from initial bootstrapping. Set up two top level page tables: one with the
the identity map and one without. Once the kernel starts switch to the second
but keep the former around for bootstrapping secondary cpus.
Start adding support for user address spaces, currently mostly untested.
Still have to solve the problem of keeping the kernel parts of the page tables
in sync. Will probably preallocate all of the ones needed.
Uses the target/debugconfig.h file pattern laid down before,
which is a bit long in the tooth but for the moment still helps
us separate target from platform.
- pull in headers for essential modules
- init clocks, gpios, uart0 out of platform_early_init
- wire up debug getc/putc to uart0
- comment out "native" uart impl
