GCC 14 is quite picky about warnings, probably more so than clang.
-Fix a bunch of printf warnings. Pointers should be printed with %p.
-Move some stuff into an anonymous namespace.
-Worked around GCC really not liking reinterpret_casting from one
function pointer type to another. Fiddled with it a bit and eventually
settled on casting the function pointer to const void * and passing it
through.
This allows it to override the WERROR setting if, say, someone put
WERROR?=1 in their local.mk. (It's a good idea)
Note: I can't really leave WERROR enabled in the default build because
of all of the variants of compilers folks use in the wild, but I do
highly suggest folks use it locally.
Currently only supports both set at the same time, but rearrange their
order such that theoretically both are pretty independent.
Somewhat untested in that there's no configuration for !KERNEL_VM and
WITH_SMP, but at least allows that config to be tested.
This triggered a out of range count overflow warning when
building for RV32 (calling the macro with `ticks >> 32`)
since the truncation happened before the shift.
port_group_remove() used to return without unlocking a thread if no
matching read port is found, which is not correct. This patch adds a
call to THREAD_UNLOCK before it returns ERR_BAD_HANDLE.
Rearrange some of the cpu initialization code to be runnable on each cpu
as they come up. Complete the 64bit bootstrap mechanism and call into C
code.
Makes it as far as trying to reschedule via an IPI. Need to implement
local apic based IPI mechanism.
It's getting too hard to maintain a single layout that works with both,
so go ahead and split it. Also redo the layout so it should be usable
with user space and syscall and sysenter instructions from either mode.
I hadn't noticed this before, but you can directly reference a global
variable in a load/store in assembly, which combines a lla + ld/sd into
a 2 instruction pair instead of 3 due to the 12 bit offset provided in
the load/store.
This fixes a problem if the text segment gets larger than ~1MB where the
raw jal instruction cannot reach. Using 'call' or 'tail' allows the
assembler to emit a 2 instruction sequence that the linker later
relaxes if it can.
When dropping from EL2 (or EL3), load vmpidr_el2 and vpidr_el2 with the
correct values to make sure EL1 sees the 'real' mpidr_el1 and midr_el1.
Though in most cases they're already configured by whatever firmware ran
before, there's no actual guarantee that it is, and it may be full of
random garbage.
