Commit Graph

2406 Commits

Author SHA1 Message Date
Travis Geiselbrecht
7a9691e826 [lib][bcache] add RAII utility class to hold a cache block 2022-09-05 21:54:36 -07:00
Travis Geiselbrecht
bb635f3a3b WIP fat resize 2022-09-05 21:54:36 -07:00
Travis Geiselbrecht
229c6557b3 [fs][fat] extend test cases to include simple file creation 2022-09-05 21:54:36 -07:00
Travis Geiselbrecht
afa659732e [fs][fat] Implement first implementation of file create
Limitations:
Only supports simple 8.3 file names
Cannot create with size > 0
Timestamp is bogus
2022-09-05 21:54:36 -07:00
Travis Geiselbrecht
1c58670d46 [lib][s][shell] fix bug in mkfile shell command 2022-09-05 21:54:36 -07:00
Travis Geiselbrecht
0ae7244eff [dev][virtio] add a partition scan once a block device is found
Move the irq registration of the virtio drivers into their init hooks so
the driver is fully working at partition scan time.

TODO: think of a more integrated solution for this. Triggering from the
bio layer, for example.
2022-09-05 19:45:37 -07:00
Travis Geiselbrecht
213cc90857 [gitignore] add clangd and vscode dirs to the ignore list 2022-08-18 19:14:22 -07:00
Travis Geiselbrecht
00d653306d [tools][bin2h] mark as python3 compatible 2022-08-18 19:11:46 -07:00
Travis Geiselbrecht
c44c6ed86e Merge from luka177:f4-update
Update the stm32f4xx ST peripheral libraries.
2022-08-14 19:07:35 -07:00
Travis Geiselbrecht
55a6a38469 [target][qemu-m4] tweak a line after stm32f4xx library changed a definition. 2022-08-14 19:06:23 -07:00
Travis Geiselbrecht
f2cf99bf73 [platform][stm32f4xx] append the necessary #define to GLOBAL_COMPILEFLAGS
GLOBAL_CFLAGS will only work for .c files, which breaks on the first
inclusion of the headers by a .cpp file. *_COMPILEFLAGS is for all
language types (C, asm, C++)
2022-08-14 19:05:20 -07:00
Travis Geiselbrecht
2985728864 [stm32f4xx][stdperiph driver] remove +x from file modes in imported files 2022-08-14 19:00:16 -07:00
Travis Geiselbrecht
627e0a5cc0 [stm32f4xx][stdperiph driver] fix a typo in a wait loop 2022-08-14 18:59:50 -07:00
Milis Linux
c4676e9445 [tcp] remove extra printf 2022-08-14 18:50:32 -07:00
Wencheng Yang
853bce759d [dev][bus][pci] fixed type1_read_byte API bug
It should invoke type1_read_byte() rather than type1_read_half.
2022-08-11 23:33:15 -07:00
Travis Geiselbrecht
62e2e7dba0 [platform][pc] move the multiboot header into generic space
Share the header with arch/x86 code
Clean up the use of the boot flags
Add code to print the framebuffer information, if present
2022-08-07 23:04:23 -07:00
Travis Geiselbrecht
8643334914 [platform][pc] update the multiboot memory detection code
Parse up to 16 pmm arenas from the multiboot memory data structure. Roll
the 32bit code to properly trim at 1GB as before, but using new logic.
Remove conditional checks on WITH_KERNEL_VM in x86 code, which only
really compiles with the mmu and the vm on.
2022-08-07 16:28:03 -07:00
Travis Geiselbrecht
497c52115b [platform][rosco-m68k] microoptimize the duart irq 2022-08-06 17:55:35 -07:00
Travis Geiselbrecht
b8de922781 [platform][rosco-m68k] delete some unused #defines 2022-08-06 17:41:12 -07:00
Travis Geiselbrecht
c3ea652c1f [platform][qemu-virt-m68k] fix timer interrupts
The IRQ calculation for the virtio range was off by 8, which caused the
virtio code to override the interrupt registration for the RTC, which
caused it to stop firing. Clean up the #defines that define irq mappings
to fix this issue.
2022-08-06 17:28:12 -07:00
Travis Geiselbrecht
fb373eb4de [arch][x86] drop march to x86-64
-march=x86-64-v2 is not supported on old compilers.

Can fix in the future, but for the moment may as well just drop -v2
since it's not really being used.
2022-07-24 20:03:46 -07:00
Travis Geiselbrecht
7505c3087a [arch][x86][fpu] spiff up the fpu code to detect things more cleanly
Doesn't really change the functionality of the code except it'll try to
work with less fpu features present.
2022-07-24 19:56:24 -07:00
Travis Geiselbrecht
c429ffcc7a [arch][x86] add more comprehensive feature bit routine
Cache copies of the first few cpuid leaves from each bank at bootup if
present. Add a fast routine to test feature bits out of this array.
2022-07-24 16:59:45 -07:00
luka177
52ca5d32c9 [External-platform-stm32f4xx]: stm32f4xx.h remove redefenitions 2022-07-24 09:13:02 +03:00
luka177
f2459fe0ab Fix line ending 2022-07-24 08:52:42 +03:00
Travis Geiselbrecht
3dff26ae7b [make] add BUILDDIR_SUFFIX build variable
This allows you to tag your build dirs with an optional string.

Update scripts/buildall to also allow building all release (DEBUG=0)
builds. Add a few other convenience switches.
2022-07-23 15:57:53 -07:00
Peter Collingbourne
576a7a7c82 [arch][arm64] determine the correct TCR_EL1.IPS at runtime
Change the early startup code to set TCR_EL1.IPS to
ID_AA64MMFR0_EL1.PARange if it has a defined value (the currently
defined values have the same meanings), but use 48-bit PAs if 52-bit
PAs are supported because 52-bit PAs have a different translation
table format that we don't support. Stash the computed TCR_EL1 in a
variable and use it in the context switch code.
2022-07-22 23:54:03 -07:00
Travis Geiselbrecht
cd96c43006 [make] define and undefine some make variables
Based on building with --warn-undefined-variables, find a few places in
the build system where undefined variables were used incorrectly, or
never set due to unused code.
2022-07-22 23:45:42 -07:00
Travis Geiselbrecht
8372f46055 [arch][riscv64] fix build with older toolchains (gcc 7.5.0)
When building fpu variant, use -march=rv64imafdc instead of rc64gc
since some older compilers and/or mainline do not understand the
equivalence when selecting libgcc.

This is only an issue on rv64 due to the need to pick out the medany
variant of libgcc.
2022-07-22 23:08:44 -07:00
luka177
6abb5b3db7 [STM32F4xx_StdPeriph_Driver] Define assert_param 2022-07-21 19:22:19 +03:00
luka177
17a2af5ceb [platform-stm32f4xx] Updata chip defenition 2022-07-21 19:19:31 +03:00
luka177
126abea100 Update to latest STM32F4xx_StdPeriph_Driver 2022-07-21 19:13:37 +03:00
Travis Geiselbrecht
b0d8aeed18 [arch][riscv] add fpu context switch support
Currently only implemented for double precision floating point.

Caveat: currently unable to only compile some code with or without
float. The linker is extremely picky about mixing float and no-float
objects, so stick with all on or off for now.

It's not as much of a problem currently because the toolchain is not
using any riscv vector instructions to assist normal code, so it's
generally only emitting fpu instructions for floating point code.
2022-07-17 23:27:42 -07:00
Travis Geiselbrecht
6462cbf51c [arch][fpu] add ability to specify per file or module if code needs fpu
Have the arch define additional compiler flags to explicit support or
not support a floating point unit.

Add ability for modules to per file or for the whole module mark code
as needing floating point support.

Add default flags for arm64, riscv, and x86 toolchains.

Needed because gcc 12 is getting much more aggressive about using vector
instructions for non float code, so getting away with avoiding it was
no longer working.

Still not perfect: printf code is being compiled with float, so it's
possible to use floating point instructions inside core kernel or
interrupt handling code if a printf is used.

Possibly will have problems on architectures where mixing float and non
float code at the linker generates issues, but so far seems to be okay.
2022-07-17 16:32:24 -07:00
Peter Collingbourne
b7af2cdf26 [arch][arm64] replace the trampoline translation table with a trampoline VBAR
I noticed that LK failed to boot on systems that do not support 64KB
page sizes (e.g. Linux KVM guest on Apple M1) because the trampoline
translation table used a compile-time hardcoded 64KB page size.

Instead of trying to make the trampoline translation table code
look for a supported page size at runtime, I realized that it should
be possible to remove the trampoline translation table entirely by
replacing it with a VBAR that branches to the instruction following
the MMU enable. That's what this patch does.
2022-07-17 13:49:59 -07:00
Travis Geiselbrecht
a007f66728 [arch][arm64] update some comments in assembly 2022-07-17 13:21:31 -07:00
Aaron Odell
be0ba2ca14 [arch][arm64] cache maintainance on page tables during boot
Add cache clean + invalidate on the page tables that get modified during
startup before the MMU is enabled. Without this, if these memory regions
were present in cache before LK started, the CPU will see the stale
cached values as soon as the MMU is enabled. Invalidating these forces
the CPU to fetch the correct values from memory after the MMU is enabled.
2022-07-17 13:18:59 -07:00
Travis Geiselbrecht
6edff96534 [make] update ip address to try to copy to in the 'install' target 2022-06-05 15:58:06 -07:00
Travis Geiselbrecht
d80592ba7d [lib][acpi_lite] add some additional LTRACEFs
Added to try to track down an issue on a particular PC.
2022-06-05 15:57:45 -07:00
Travis Geiselbrecht
c580451e83 [arch][riscv] more interrupt cause debugging strings 2022-05-29 17:55:41 -07:00
Travis Geiselbrecht
095aca80f1 [arch][riscv][sbi] add the pmu extension, tweak boot messages, qemu-virt use reset calls 2022-05-29 14:48:04 -07:00
Travis Geiselbrecht
b3dd72ab1d [github][ci] switch current toolchain to 12.1 2022-05-22 16:41:57 -07:00
Travis Geiselbrecht
a8e460f847 [arch][riscv] add -misa-spec=2.2 to the compile switches
This works around an issue with newer compilers that default to an
earlier ISA spec that doesn't by default include the zicsr extension by
default.

If the compiler doesn't support the switch, then it's assumed that it
has the extension by default, as older gcc compilers did.
2022-05-22 15:14:34 -07:00
Travis Geiselbrecht
e798c47e89 [lib][debugcommands] add a workaround for gcc 12.1
GCC 12 seems to be much more aggressive about warnings about any
dereferences near 0. For this particular piece of code, which is
explicitly trying to force a fault by touching address 1, simply disable
the warning around the block of code.
2022-05-21 17:29:30 -07:00
Travis Geiselbrecht
d496ca1902 [platform][rosco-m68k] add proper support for the system data block
A block of data left behind by the firmware to tell the system important
things such as the size of memory.
2022-05-21 17:26:49 -07:00
Travis Geiselbrecht
4695035505 [arch][riscv] C++ header guard the core riscv header 2022-05-13 01:06:58 -07:00
Travis Geiselbrecht
469b0b73f6 [lib][elf] add C++ header guards 2022-05-13 01:04:05 -07:00
Travis Geiselbrecht
4a7c0ae925 [fs][fat] fix an incorrect assert 2022-05-13 01:03:15 -07:00
Travis Geiselbrecht
d525a5f7b5 [fs][fat][test] pass in the path to the test dir so files can be included correctly
Due to the way INCBIN works, the full path relative to the root of the
assembler instance must be used, so pass in the full path as a define.
2022-05-12 22:26:22 -07:00
Travis Geiselbrecht
def9bea065 [fs][fat] general fs structural improvements
Move more of the driver into a proper object oriented model.
Start to build the structure to track open file/dirs so as to
allow multiple open instances share the same underlying object.
2022-05-12 20:26:52 -07:00