Move common logic into a default routine in platform/power that other
platforms can reuse to implement the general default shutdown logic.
Add helper routines to print the cause.
Refactor the platforms that had substantial halt logic to reuse the
default implementation.
Three platforms had basically duplicated logic that just was pulled into
the fdtwalk library. Fix these up to call into those routines instead.
-qemu-virt-arm
-qemu-virt-riscv
-jh7110 (visionfive 2 soc)
A pretty simple mechanism, a list of extensions added to
RISCV_EXTENSION_LIST make variable is expanded to an underscore
delimited string appended to the end of -march=
Pretty simple but it should work for now.
Instead of setting a counter of the number of secondaries to start, have
platform or target code pass in a list of harts to start instead. This
allows for there to be discontinuties in the layout of the cpu harts, or
in the case of some sifive based hardware, hart 0 is otherwise offline.
Looks like this is described in /reserved_memory/mmode_resv@<address> as
patched by opensbi on top of the existing qemu provided dtb.
Future patch should parse this instead of hard coding it.
Based on building with --warn-undefined-variables, find a few places in
the build system where undefined variables were used incorrectly, or
never set due to unused code.
In the case of platforms where a bios or firmware has not already
assigned all the resources, do so. Requires the platform supply one or
more ranges of physical address space and IO that can be mapped into
BARs.
Handles iterating through bridges, computing the sizes of all the
peripherals downstream and rolling that up as well.
Wire them up on arm and riscv which need them. x86-pc does not, so dont
call it.
Also fix a few miscellaneous bugs, notably PCI not detecting 64bit bars
properly due to an off by one bit error.
FDT encodes the range of available mmio and io ports that the PCI bus
can use to map bars. Return this information out of the FDT walker
helper routines to feed into the PCI bus manager in the future.
-Add a bus manager level, which is an object oriented walk of the pci
busses to build a per device object for later manipulation.
-Add features to enable MSI interrupts.
-Extend generic interrupt api to allow the platform to allocate vectors
for MSI interrupts.
-Rearrange a bit of the pc platform for the platform api changes.
-Add PC platform support for using the local apic to EOI MSI vectors.
-Fix up a few existing PCI drivers for small API changes.
-Add a few stubbed out routines for non PC platforms that use PCI.
Add build system support for at least being aware of the FPU on
the architecture, not building code to use it.
At the moment, only sets up the FPU into Initial state prior to
entering user space and then ignores it.
Up until now the bottom part of ram has been identity mapped, left over
from initial bootstrapping. Set up two top level page tables: one with the
the identity map and one without. Once the kernel starts switch to the second
but keep the former around for bootstrapping secondary cpus.
Start adding support for user address spaces, currently mostly untested.
Still have to solve the problem of keeping the kernel parts of the page tables
in sync. Will probably preallocate all of the ones needed.
-Add support for probing SBI extensions
-Switch to newer versions if present
-Add HBM extension which allows proper secondary cpu bootstrap
-Add support for secondary bootup via HBM.
Implements both SV39 and SV48. No 32bit support yet.
Currently implements basic setup of paging in start.S by mapping a large
chunk of memory into both an identity map and to the bottom of the
kernel address space. Run the kernel out of this physical mapping.
Added basic arch mmu support for querying existing paging structures and
mapping 4K pages. No unmap support as of yet.
System boots with mmu on when running supervisor test on qemu. Untested
on real hardware as of yet.
No real change except moving fdt walking code into the fdtwalk library.
Also update some constants for ARM virt and bump the load address to
make sure the FDT works. Turns out it had been missing for a while so it
was actually not finding it because the kernel was loaded too close to
the start of memory.
-Fix plic driver to handle machine vs supervisor mode
-Add switch to scripts/do-qemuriscv to run in supervisor mode (with OpenSBI)
-Use the FDT to detect the number of cpus and size of memory
Tweak the novm allocator to let us more easily add a variable sized
arena at boot.
Also added code to trap secondary cpus and reenable the use of WFI
instruction.
Very little needed to port except to conditionalize some assembly in the
context switch and exception code. Mostly needed to move build system
stuff around and add a new project.
The virt machine is a generic target, much like the arm virt machine.
Intended to be simple to use and a good target to run large systems like
linux on. At the moment simply support booting and simple uart and timer
support.
