- Move a bit of the shared logic of secondary bootstrapping into a new
function, lk_secondary_cpu_entry_early() which sets the current cpu
pointer before calling the first half of the secondary LK_INIT
routines.
- Create the per cpu idle threads on the main cpu instead of the
secondary as they come up.
- Tweak all of the SMP capable architectures to use this new path.
- Move the top level mp routines into a separate file top/mp.c
- A bit more correctly ifdef out more SMP code.
- Make the secondary entry point be logically separate function, though
declared in the same file.
- Add a trick where the kernel base + 4 is the secondary entry point.
Not really useful except makes it easy to compute the offset
elsewhere.
- Changed the entry point to arm64_reset and move _start to the linker
script, which is what most other arches do.
- While was in the linker script, make sure the text segment is aligned
on MAXPAGESIZE, though doesn't make any real difference currently.
- Generally clean up the assembly in start.S with newer macros from
Fuchsia, and avoid using ldr X, =value as much as possible.
- Fix and make sure arm64 can build and run with WITH_SMP set to false.
Add a new no-smp project to test this.
Note this will likely break systems where all of the cpus enter the
kernel simultaneously, which we can fix if that becomes an issue.
Secondary code now completely assumes the cpu number is passed in x0.
This can be emulated with platform specific trampoline code if it needs
to that then just directs into the the secondary entry point, instead of
trying to make the arch code have to deal with all cases.
- Add a percpu structure for each cpu, akin to x86-64 and riscv. Pointed
to by x18, which is now reserved for this in the kernel. Tweaked
exception and context switch routines to leave x18 alone.
- Remove the cpu-trapping spinlock logic that is unused in mainline,
probably. (Can add a new version of it back if it's necessary).
- Switch fdtwalk helper to using the newer, cleaner way of initializing
secondaries using the PSCI CPU_ON argument that should be pretty
standard on modern implementations. (Possibly an issue with old
firmware).
- Remove the notion of computing the cpu ID from the Affinity levels,
which doesn't really work properly on modern ARM CPUs which more or
less abandoned the logical meaning of AFFn.
More definitively set up each cpu's SCTLR_EL1 instead of relying on any
default values being present. Also set all RES1 values to 1 according to
what is useful at the moment, generally giving the maximum amount of
priviledges EL1 and EL0.
1) Decode FSC and dump more human readable status
2) Add support of stack unwinding as referred from
arm64 procedure call standard and frame pointer usage.
3) Compiler options for not omitting frame pointer
are enabled to ensure usage of frame pointers even
with higher optimization levels enabled.
Signed-off-by: vannapurve <vannapurve@google.com>
Now you need to include arch/atomic.h to get to the atomic routines.
This simplifies a recusion issue in the way arch/ops.h included
arch_ops. Also just generally makes things cleaner.
Almost nothing changes here except moving braces to the same line as the
function declaration. Everything else is largely whitespace changes and
a few dangling files with tab indents.
See scripts/codestyle
Enable fiqs at boot, and during exceptions that can trigger a
context switch.
This fixes two problems. It avoids deadlock in code that uses spinlocks
with fiqs enabled as one cpu could be holding that spinlock and get
interrupted by an fiq, while another cpu is blocked trying to lock that
spinlock with fiqs disabled. This deadlocks if the fiq is delivered to
both these cpus and the second cpu is responsible to clearing the
interrupt.
Also, since thread_preempt can return with fiqs enabled,
regrestore_short could get interrupted by an fiq which would then
corrupt elr_el1 and spsr_el1.
Change-Id: I427f39ff94514866bf87f48393d145b7f1723502
There are several use cases for this:
- Generic kernel on a system with fewer cpus.
- Systems with two clusters that cannot run concurrently.
- LK as the secure os on a system where secondary cpus do not
boot until the non-secure os boots.
Change-Id: I17917944c485ff4ac581c159b4abba05471ee5b8
-in arm start.S, calculate and move the current binary to the proper physical
location before enabling the mmu.
-add arch_chain_load which does the necessary translations from virtual to
physical, tries to gracefully shut the system down, and branches into the loaded binary.
