Travis Geiselbrecht
451fa18fc9
[platform][stm32f7xx][qspi] refactor clock/irq out of target
...
-Removes a call to QSPI_Deinit
-Makes sure the target doesn't initialize the irq handler to a bad priority
2015-10-15 11:48:08 -07:00
Travis Geiselbrecht
28e5a7ab21
[target][stm32746g-eval2] add qspi to this target
2015-10-15 11:48:08 -07:00
Travis Geiselbrecht
95bae7b1e7
[lib][minip] add utility routine to generate a random mac address
...
-Move both stm32f7xx targets to this mechanism
2015-10-15 11:48:08 -07:00
Travis Geiselbrecht
c7ce0b9361
[lib][display] update display_get_info to return success/failure
...
Update all the users to check for error.
2015-10-08 15:54:40 -07:00
Travis Geiselbrecht
8e4c0ac594
[platform][stm32f7xx] move mpu initialization into platform, set up inaccessible region at 0
2015-09-17 14:06:14 -07:00
Christopher Anderson
9a5589a4a4
[minip][pktbuf] Move pktbuf allocation to a common pool
...
Rather than having a pool for pktbuf buffers and a pool for pktbufs, move
them to a common pool.
2015-09-15 16:28:52 -07:00
Carlos Pizano
7bcf5f66c5
[target][stm32f7] Configure Ethernet PHY for stm32f746g-disco
2015-09-11 18:01:47 -07:00
Carlos Pizano
0b0b79be57
move stmf7 sdram code to /platform
...
BUG=none
R=travisg@google.com
Review URL: https://codereview.chromium.org/1324223002 .
2015-09-03 14:10:25 -07:00
Travis Geiselbrecht
4a40dc2430
[platform][stm32f7xxx] move eth initialization into target space
2015-08-27 12:28:46 -07:00
Travis Geiselbrecht
7c56ee2bfa
[platform][stm32f7xx] wire ethernet driver up to minip
...
Enable it by default on the stm32746g-eval2 platform
2015-08-26 17:57:27 -07:00
Travis Geiselbrecht
5d1e1a6d60
[platform][stm32f7xx] first stab at working ethernet driver
...
Does nothing but receive packets and drop them on the floor. Wire up
to net stack(s) next.
2015-08-26 17:05:44 -07:00
Travis Geiselbrecht
37969468f0
[target][stm32746g] switch the LCD to 565 mode and remove the extraneous flush
...
Turns out gfx_flush() already calls a cache flush, the flush callback was
apparently intended to be in case you need to initiate an update to the panel.
2015-08-21 12:00:44 -07:00
Travis Geiselbrecht
d765352674
[target][stm32746g] use the new proper cache flush api for lcd framebuffer writeback
2015-08-21 11:33:26 -07:00
Travis Geiselbrecht
462a40c597
[target][stm32746g-eval2] add cache flushing routine to lcd updates
2015-08-19 17:53:59 -07:00
Travis Geiselbrecht
dc454e719c
[target][stm32746g-eval2] enable external SRAM block, update MPU cache params
...
For future reference:
TEX 001 C 1 B 1 S 0 is the full cache params for cortex-m7.
2015-08-19 17:24:30 -07:00
Carlos Pizano
fee9612b2e
set heap after the lcd memory
...
So that the gfx console commands don't crash LK.
2015-08-18 14:36:32 -07:00
Travis Geiselbrecht
3967239eb7
[target][stm32746g-eval2] add MPU cache region for sdram, clear lcd on boot
2015-08-17 16:02:19 -07:00
Travis Geiselbrecht
423338d8b7
[target][stm32746g-eval2] add support for lk's display/gfx api
2015-08-17 16:02:19 -07:00
Travis Geiselbrecht
7a97739347
[target][stm32746g-eval2] add lcd initialization sequence
2015-08-17 12:33:31 -07:00
Travis Geiselbrecht
cee3576d22
[target][stm32746g-eval2] add sdram initialization sequence
2015-08-17 11:59:28 -07:00
Travis Geiselbrecht
3799cc6999
[platform][stm32f7] general cleanup of platform/target code
...
-fix gpio_config, switch usart1 config to this api, move into target code
-switch to just including platform/stm32.h which gets all of the HAL apis
-redo the interrupt driven rx side of usart to be much simpler and directly
push into the cbuf without using most of the HAL goo.
-reformat for 4 spaces
2015-08-14 15:33:46 -07:00
Travis Geiselbrecht
867782bb56
WIP STM32F7
...
add rx side of uart
enable systick at proper speed
2015-07-10 00:52:37 -07:00
Travis Geiselbrecht
94d4d499f7
WIP support for stm32f746g-eval2 board
2015-07-08 02:24:59 -07:00
