Disable IO and mem decoding around BAR enumation as described in the PCI
Local Bus specification. This behavior should be safer when messing
around BARs for BAR lengths.
Looks like this is described in /reserved_memory/mmode_resv@<address> as
patched by opensbi on top of the existing qemu provided dtb.
Future patch should parse this instead of hard coding it.
Accessing un-mapped address/address-range results in data abort. Ensure
the address and all the pages in the requested range are mapped. Mapping
is checked at page size, also adjusts the stop address to the nearest valid
address mapped.
Move the mmu_initial_mapping from platform into arch/x86. For this
architecture the default mappings are basically hard coded in arch/x86
anyway, so move ownership of this data there, closer to where it's
actually initialized.
Update the 32 and 64bit paging code to properly use the paddr_to_kvaddr
and vice versa routines.
Update to allocate page tables directly from the pmm instead of the heap
(on 32bit code).
Clean up the x86.h file a bit with how constants are defined
Switch rdtsc to builtin
Added all of the known bits for the main CR registers.
Move the invlpg macro over to the common header.
Update comments in start.S
The old method assumed that all of the tables were mapped within the
kmap area of the kernel. This basically works on 64bit machines but on a
32bit x86 its entirely likely the ACPI tables are at higher physical
addresses that can be reached, which is currently limited to 1GB.
By using the VM it means it can individually map the headers and each
individual table.
Trim the arch mmu unit tests accordingly.
Should probably switch this to a #define, but it's possible some of
these queries could be dynamically detected (XN for example). May
revisit at some point.
vm map takes arg 3 as virtual address. And same needs
to be passed to retrieve aspace. Fix this by passing
right arg.
Test: Ran 'vm map' test
] vm map 0xc0000000 0xffff000ff0000000 1 0x0
arch_mmu_map returns 0
Signed-off-by: Chintan Pandya <chintanpandya@google.com>
-Large cleanup of both the 32 and 64bit mmu code. Still the same general
flow but tighten up usage of mixing physical addresses with virtual
addresses.
-Remove the PAE code path from 32bit mmu, which was unused.
Allow asking the arch layer if it supports NX pages or NS pages.
Have the arch mmu test code test accordingly.
Also tweak the tests to pass on arm32 mmu, which does not precisely
match the return semantics of the rest of the mmu routines on map/unmap.
Some of the 16 bit values the cpu pushes on the stack are aligned to
32bit offsets but actually only 16 bits were pushed. Make sure printf
masks off the top 16 bits when printing these fields out.
Save the model/family information in a new structure.
Move the printing portion of the detection to the arch_init runtime
so it gets a chance to print after the uart is initialized.
Turns out all of the in and rep ins/outs instruction macros have been wrong
since they were first added.
-Make sure they clobber memory
-Make sure edi/esi/ecx registers are marked as both read and written by
the instruction.
The latter was causing a codegen problem in the ide driver where the
pointer was pushed forward by a rep ins but the compiler didn't know the
register was modified.
GLOBAL_CFLAGS will only work for .c files, which breaks on the first
inclusion of the headers by a .cpp file. *_COMPILEFLAGS is for all
language types (C, asm, C++)
