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2c9c5959e7df68ca889888ebbc0099eba635defb
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Author SHA1 Message Date
Arve Hjønnevåg
2c9c5959e7 Merge branch 'master' of https://github.com/travisg/lk into smp 
Change-Id: Iecb11d57b6f089234c0826932bdb229588939750
 2015-05-18 16:49:37 -07:00
Michael Ryleev
0e55675afe [make] Update MAKECONFIGHEADER macro (round 2) 
Add "c++" => "cpp" and "C++" to "CPP" translation
to inclusion guard portion of config.h

Change-Id: Id1c15209427e8e6054a85bf2e091a47b7b5a1c00
 2015-05-18 16:15:51 -07:00
Arve Hjønnevåg
1227165423 [arch][arm64] Reduce stack size 
Change-Id: I3a4457d62d545aafb58dd6adf95982e010a997b4
 2015-05-13 20:40:07 -07:00
Michael Ryleev
1675485aa8 [make] Update MAKECONFIGHEADER macro 
Add "C++" => "CPP" translation to support libraries
having "c++" in their names, for example libstdc++.
Without such translation, resulting #define does not
compile.

Change-Id: Ieac533782a26b4ce87caf9ad2ec1105c25eeaf01
 2015-05-13 20:40:06 -07:00
Arve Hjønnevåg
b4aaff6ebd [arch][arm64][mmu] Add barrier in map 
Fixes random crashes on Cortex-A53

Change-Id: Id3d5c8347dbc4389784e522d083e7658070edce4
 2015-05-13 20:21:08 -07:00
Adam Langley
99c543c6d8 Add a handful of libc functions for BoringSSL. 
This change adds:
	declarations:
		abort
		strcasecmp
		getenv
	definitions:
		bsearch
		strtoul
	macros:
		PRIu32
		PRIx32

Change-Id: I2968da411d6810520905bcd3b8a370bf83bee804
 2015-05-13 20:21:08 -07:00
Andres Morales
a4580564ca Add 64-bit swap functions 
Change-Id: I23c0992defe1f79f95c62e033dc4b9e25e6bbead
 2015-05-13 20:21:08 -07:00
Michael Ryleev
499f47cc5d [arch][arm64] Fix atomic_cmpxchg 
Switch to use GCC builtin implementation.

Change-Id: Ied51917f1b0f1e7e49f24ac59e239bac7769363f
 2015-05-13 20:21:08 -07:00
Michael Ryleev
69c954a83f [arch][arm] Fixup atomic_cmpxchg when compiling with thumb 
Change-Id: Idd09b9174a908208994f4b290a65374c9d5e9a8c
 2015-05-13 20:21:08 -07:00
Michael Ryleev
a1268d37ac [arch][arm64][mmu] Update arch_mmu_query to support ARCH_MMU_FLAG_NS flag 
Change-Id: Ie64583786882a5b9a902993e511ed30efcec988e
Signed-off-by: Michael Ryleev <gmar@google.com>
 2015-05-13 20:21:08 -07:00
Michael Ryleev
2eb00719fd [arch][arm][mmu] Update arm_mmu_query to support ARCH_MMU_FLAG_NS flag 
Change-Id: Ia2f671777502573ba254895b10b03e5f8921e02b
Signed-off-by: Michael Ryleev <gmar@google.com>
 2015-05-13 20:21:08 -07:00
Michael Ryleev
5dc490ad33 [arch][arm][mmu] Handle shareable flag when compiling WITH_SMP 
Set shareable flag when mapping cachable memory for both L1 and L2 entries
when compiling WITH_SMP.

Change-Id: I6c371a7b86f33dd8e93d20079848d1ee8f1fc0c4
 2015-05-13 20:21:08 -07:00
Michael Ryleev
e6ae15d0b0 [arch][arm][mmu] fixup/add few definitions 
Change definition of MMU_MEMORY_L1/L2_TYPE_MASK :
      TEX field in both L1 and L2 is 3 bits wide and bit 2 switches
      the meaning of all bits in TEX[0:2], C, B combo.

  Add the following definitions:
       MMU_MEMORY_L1_CB_SHIFT  - a position of CB bits in L1 entry
       MMU_MEMORY_L1_TEX_SHIFT - a position of TEX field in L1 entry
       MMU_MEMORY_SET_L1_INNER - similar to MMU_MEMORY_SET_L2_INNER but for L1
       MMU_MEMORY_SET_L1_OUTER - similar to MMU_MEMORY_SET_L2_OUTER but for L1
       MMU_MEMORY_SET_L1_CACHEABLE_MEM - similar for MMU_MEMORY_SET_L2_CACHEABLE_MEM

Change-Id: Ibb522553dab669c3a298513bd656fb22331366da
 2015-05-13 20:21:08 -07:00
Arve Hjønnevåg
396ce1a1e6 [arch][arm64] fix arm64 toolchain selection fix 
Change-Id: I48ca30bd93c7b01ea66a63c49fb90ce5b0874c78
 2015-05-13 20:21:08 -07:00
Arve Hjønnevåg
c027dbd0d4 [dev][interrupt][arm_gic] Fix fiq code to get cpu number from arch_curr_cpu_num 
Fixes fiq support on multicluster systems.

Change-Id: If19a78b580eec79b7194ea511f0dcd22bc18fd83
 2015-05-13 20:21:07 -07:00
Arve Hjønnevåg
e07de0831a [kernel][thread] Fixup conflict resolution of "Allow pinning threads to a specific cpu" 
Change-Id: I8b2cab8b60e5a25ab5270db55bbe6b59eecf88c6
 2015-05-13 20:21:07 -07:00
Arve Hjønnevåg
645efc77a8 [arch][arm/arm64] Validate that start.S used cpu number that arch_curr_cpu_num returns. 
Change-Id: I39e33214e20668c7c5e739c5bc84fa73d777b764
 2015-05-13 20:21:05 -07:00
Arve Hjønnevåg
8f0d310616 [arch][arm/arm64] Support systems with mutiple clusters 
Set SMP_CPU_CLUSTER_SHIFT to the number of bits needed within
each cluster.
All clusters except the last one, need to have the name number
of cpus to avoid gaps.

Also, add a SMP_CPU_ID_BITS variable and limit this to 8 bits
on the bcm2835 platform instead of ignoring cluster ids by default
on arm.

Change-Id: I1d0be1d9c99d5b85368ce71623e6e7d14fefd604
 2015-05-13 20:20:39 -07:00
Arve Hjønnevåg
8985379e2f [arch][arm] Use inner shareable page table walks on SMP 
Fixes random crashes on multi-cluster systems.

Change-Id: I663878b46b4143eb6100f24175e9852fb1d84a4d
 2015-05-13 20:20:39 -07:00
Arve Hjønnevåg
f84c38287c [lib][heap] Print error message when heap_grow fails. 
Change-Id: Idf6d0e1c6cf638c3fe1ef02560c27028b6eef99d
 2015-05-13 20:20:39 -07:00
Arve Hjønnevåg
be2ba93d69 [kernel][thread] Fix startup problem 
Change-Id: I4b0f70a5951d641a6dbb477c6f48600aaef8e219
 2015-05-13 20:20:39 -07:00
Arve Hjønnevåg
2df0ce6320 [arch][arm64] Don't print by default if arm64_mmu_unmap_pt is called on a cleared entry 
Change-Id: Ie31b34fc16ad27e42f6bb49c8c61efaaeaebbb45
 2015-05-13 20:20:39 -07:00
Arve Hjønnevåg
071878c104 [kernel][thread] Hack thread_is_realtime to ignore thread that don't have a high priority 
Allow setting the realtime flag on low priority threads to disable the
tick without also loosing ipi interrupts.

Change-Id: Ia30e4d20105a65945918fc996c3114c3852963a9
 2015-05-13 20:20:39 -07:00
Arve Hjønnevåg
8240cfbb9d [arch][arm] Round up to align end of initial mapping to a section. 
Allows booting with less than 1MB ram.

Change-Id: I334d2cf14f12194115d64695928333b69632f0fd
 2015-05-13 20:20:39 -07:00
Arve Hjønnevåg
54eb83e251 [include][bits] Fix bitmask operation on systems where long and int are not the same size 
Change-Id: I2850f051d51b79c3aaefb6d7019afb025026b97a
 2015-05-13 20:20:39 -07:00
Arve Hjønnevåg
3302ea6002 [arch][arm/arm64] Don't wait for secondary cpus to boot 
There are several use cases for this:
- Generic kernel on a system with fewer cpus.
- Systems with two clusters that cannot run concurrently.
- LK as the secure os on a system where secondary cpus do not
  boot until the non-secure os boots.

Change-Id: I17917944c485ff4ac581c159b4abba05471ee5b8
 2015-05-13 20:20:39 -07:00
Arve Hjønnevåg
196edc8f57 [arch][arm64] Fix load/store excusive on Cortex-A53 
Change outer mair value for normal memory from write-through to
write-back.

Change-Id: I1c6f662985b4350501be453571883ca5bdd357ce
 2015-05-13 20:20:39 -07:00
Arve Hjønnevåg
47e5b7101f [arch][arm64] SMP support 
Change-Id: Ieb9dec2ad64b9b04d51da15a17b9e7c4df50460b
 2015-05-13 20:20:35 -07:00
Arve Hjønnevåg
d3eb95aaf1 [arch][arm64] Implement arch_curr_cpu_num 
Only 4 cpus are supported for now

Change-Id: I346b5a51cb6e29c121e7755935cd788c7ca063e3
 2015-05-13 18:08:45 -07:00
Arve Hjønnevåg
97e3611e1d [arch][arm64] Implement arch_interrupt_save/restore flags w/FIQ support 
Change-Id: I4292e6a882a1fb3d9cf78abee394f159756ab340
 2015-05-13 18:08:45 -07:00
Arve Hjønnevåg
c1f8412010 [arch][arm64] Move spinlock to smp branch api 
Change-Id: I7c3d8d65a7f442cb1ecab563852cc9a40bd7a9e5
 2015-05-13 18:08:45 -07:00
Arve Hjønnevåg
7b089ba757 [arch][arm64] Support INT_RESCHEDULE 
Change-Id: I19f69744574ce3a733650b378a85d19f6c088677
 2015-05-13 18:08:45 -07:00
Arve Hjønnevåg
47e06a3f34 [dev][interrupt][arm_gic] Call sm_handle_fiq from platform_fiq 
If WITH_LIB_SM is set, call sm_handle_fiq instead of sm_handle_irq
from platform_fiq. This is needed to allow sm_handle_irq to wake up
a thread instead of switching back to ns from the interrupt handler.

Change-Id: Idc728343bc31c07a3149d68730bd57ee28be08f8
 2015-05-13 18:08:45 -07:00
Arve Hjønnevåg
5177e5ba40 [dev][interrupt][arm_gic] Enable ns interrupts if WITH_LIB_SM is set 
Change-Id: I436b81fe12a969f745ab20cf97500aed1e6f77f7
 2015-05-13 18:08:45 -07:00
Arve Hjønnevåg
03d68ec2ae [dev][interrupt][arm_gic] Add trace printf for irq numbers returned to ns 
Change-Id: I834ea1861e09edc770f081253a34364e3a8eaeba
 2015-05-13 18:08:45 -07:00
Arve Hjønnevåg
4acd0e4324 [arch][arm] Fix alternate secondary entry path for smp branch 
Change-Id: Ibcd5c00f993dd1a5715666cef90d742706253a31
 2015-05-13 18:08:45 -07:00
Nathaniel Quillin
9b8e7bc33c [lib][minip] change udp_send() to use iovecs 
Change-Id: I7befe1bb6c857f63ad810ae72f7fba0db57f4693
 2015-05-12 14:44:30 -07:00
Travis Geiselbrecht
613e1c3457 [lib][minip] avoid a double copy in udp_send() 
Change-Id: I2b786f0bcbf9b9da73034ee5d98bb5d4402968e1
 2015-05-12 12:07:18 -07:00
Travis Geiselbrecht
553ca5f735 [lib][norfs] add appropriate copyright headers for norfs 
Change-Id: I763551f9d13c378d6798bb65de503259ecf26cb2
 2015-05-11 18:22:23 -07:00
Travis Geiselbrecht
453167071a [project][uzed-test] add a few of the newer libraries to the project 
Change-Id: I97f9bc99cedbb8a656f76e635e538b4792c0091e
 2015-05-11 18:14:26 -07:00
Travis Geiselbrecht
ec41a6e42d [lib][buildsig] add a library that embeds a build signature within the binary 
Change-Id: I97d493ed4131accc2601d0def2e39a3372bfbc89
 2015-05-11 18:10:50 -07:00
Travis Geiselbrecht
a2b9df457f [lib][version] add a library that provides a structure with the build version 
Change-Id: Ifa425f601f47410b4ffbb62ca13bfcfe3cb5a267
 2015-05-11 18:10:50 -07:00
Travis Geiselbrecht
49dbd25d34 [lib][norfs] a nor flash based file system with wear levelling 
Change-Id: Ie5795154858d54220831d56eef3e73bd61fa9bab
 2015-05-11 18:08:24 -07:00
Travis Geiselbrecht
0625287edd [lib][klog] a library to handle a kernel log that survives reboot 
Change-Id: I99bc888a9afa35199392c7829b27e8b6346e59f4
 2015-05-11 18:08:24 -07:00
Travis Geiselbrecht
ba384928e2 [lib][watchdog] a library to manage hardware and software watchdogs 
Change-Id: If31c3b4f7f89c1045bea7f54fe1e321a0c6479b8
 2015-05-11 18:08:24 -07:00
John Grossman
493b7667c1 [lk][cbuf] Add some features to cbufs 
+ Tweak read so that passing NULL for the data buffer causes the read
  operation to consume bytes (move the read pointer) without copying
  the data.
+ Tweak write so that passing NULL for the data buffer causes the
  write operation to fill zeros instead of copying from a source
  buffer.
+ Add a peek operation which will fill out (up to) 2 iovec_ts with the
  contiguous regions of the cbuf which are ready to read.
+ Add a reset method which unconditionally consumes all of the data in
  the cbuf.
+ Write some documentation for the interface in the header file.

Signed-off-by: John Grossman <johngro@google.com>
Change-Id: I2a2d2ab524449a10fa1e174500cd6dfa12a05a3f
 2015-05-08 10:49:06 -07:00
John Grossman
73900af915 [lk][tools] Fix a small error in the buildall script. 
Make use of the -j level which was computed in the script instead of
hardcoding to -j4

Change-Id: I99bf175709d1a2c8757fe73a7ddbb6361d431e69
Signed-off-by: John Grossman <johngro@google.com>
 2015-05-08 10:45:51 -07:00
Travis Geiselbrecht
b49071770d [zynq][gem] fix newly introduced bug setting up tx descriptors for the first time 
Change-Id: I04b174fa9bde08b8a5a334bd33e049f8e445bb91
 2015-05-07 19:39:48 -07:00
Travis Geiselbrecht
71313ca6e6 [platform][zynq][gem] flatten all the gem tracking registers into a single structure 
This actually manifests itself as a slight win performance wise, due
to better codegen with all the variables being near each other.
 2015-05-06 16:45:07 -07:00
Travis Geiselbrecht
db1911ecdf [lib][minip] few optimizations 
-optimize mac address copies
-tcp skip rx checksum if nic has already done it
-add run time tcp debugging switch
 2015-05-06 16:26:07 -07:00