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Commit Graph

707 Commits

Author SHA1 Message Date
Travis Geiselbrecht
26effb3988 [platform][lpc15xx] move the lpcopen driver library into external/ 2016-02-20 11:31:49 -08:00
Eric Holland
949f4959a5 [uart] fixed race condition in uart_putc 2016-02-19 23:10:58 -08:00
Travis Geiselbrecht
a4ca0a6e00 [vmm] move most users of arch_mmu_query directly to vaddr_to_paddr() 2016-02-14 12:45:53 -08:00
Travis Geiselbrecht
d569c090ea [vim] remove vim expandtab comments on most of the files 2016-02-14 12:32:07 -08:00
Travis Geiselbrecht
2eb32a4369 [style] mass reformat all the non external code to 4 space indents 
Ran everything through scripts/codestyle.space, which uses astyle
to generally follow K&R style.

Biggest non whitespace change is pulling brackets down on function
declarations, which I'm pretty ambivalent about, but astyle insists
on taking a stance
 2016-02-14 12:24:01 -08:00
Travis Geiselbrecht
fe92f4ad74 [platform][omap3] remove this old platform 2016-02-14 11:46:19 -08:00
Travis Geiselbrecht
4382d844e4 [platform][am335x] remove this old unused platform/target 
Was a port to the beaglebone, hasn't been used in a long time.
 2016-02-14 11:43:49 -08:00
Travis Geiselbrecht
b80e15059f [platform][sam3] Haven't used this platform in a while, removing 
Was only really ever used to fool around with the ADK2012,
which is so 2012.
 2016-02-14 11:40:50 -08:00
Erik Gilling
5ecd3db8c8 stm32f0xx: Add SPI support. 2016-02-09 10:39:38 -08:00
Erik Gilling
6c34a100e7 stm32f0xx: Add DMA driver. 2016-02-09 10:39:38 -08:00
Erik Gilling
367e0e7ef7 stm32f0xx: Fix DMA IRQ name. 2016-02-09 10:39:38 -08:00
Erik Gilling
fc54cfba84 stm32f0xx: Add CAN Bus support. 
Only recv uses IRQs at the moment.  Sends will fail (return false) if
there are no available TX mailboxes.
 2016-02-07 20:33:32 -08:00
Erik Gilling
81c66065a6 stm32f0xx: Alphabetize MODULE_SOURCES. 2016-02-07 20:33:32 -08:00
Travis Geiselbrecht
a7496980c0 [lib][stdio] fix the build after -fbuiltin and io changes 2016-02-07 16:05:46 -08:00
Gurjant Kalsi
05cd5e9797 [qspi][stm32f7] Add const qualifier to QSPI_CommandTypeDef arguments that are 
never modified. Also change implementation of HAL_QSPI_AutoPolling_IT and
HAL_QSPI_AutoPolling such that the caller is responsible for setting the NbData
field of QSPI_CommandTypeDef. This allows this parameter to be const as well.
 2016-02-07 11:28:46 -08:00
Gurjant Kalsi
a6e3aeff12 [fs][spifs][qspi] Reduce stack usage by 12% of the total default stack size for some critical call paths through the spifs filesystem layer. 2016-02-07 11:28:39 -08:00
Erik Gilling
de12d4bcde stm32f0xx: Initial platform support. 
GPIO and uart work.
 2016-02-04 14:05:46 -06:00
Erik Gilling
7d76f08c98 stm32f0xx: Import CMSIS and StdPeriph driver. 2016-02-04 14:05:46 -06:00
Gurjant Kalsi
1cca765aa4 [qspi][stm32f7] Support exiting linear mode for STM32F7 QSPI Part 
Support the BIO_IOCTL_PUT_MEM_MAP ioctl. Also add tests for
entering and exiting linear mode in the bio tests.
 2016-02-03 14:07:37 -08:00
Adam Barth
c3167c48d8 [platform][bcm2835] Add gpio support 2016-02-01 09:24:38 -06:00
Gurjant Kalsi
bf4fef6f58 [qspi][dma][stm32f7] Fix Dartuino QSPI DMA bug by directly programming the DMA controller as opposed to using the vendor lib. 2016-01-30 17:13:33 -08:00
Gurjant Kalsi
0976efd8e1 [qspi][stm32f7] Fix autopolling bug in QSPI driver. 2016-01-30 17:13:20 -08:00
Travis Geiselbrecht
af6695404a [platform][qemu-virt] use PSCI to boot the secondary cpus 
Since switching to qemu-virt, smp has actually been broken due
to qemu holding each of the secondary cpus in halt at boot. A PSCI
hypervisor call is needed to wake each of them up.
 2016-01-24 17:38:21 -08:00
Eric Holland
a619f2e9cd [target][platform] Nordic nrf51xxx platform support and test projects 2016-01-17 17:44:56 -08:00
Travis Geiselbrecht
f2430462b6 [platform][stm32f7xx] add reboot command and script for dartuino 2016-01-04 17:40:30 -08:00
Travis Geiselbrecht
36d27bf2f0 [platform][stm32f7xx] add dev/gpio to the build, which adds a gpio debug command line 2015-12-08 17:38:24 -08:00
Travis Geiselbrecht
042376148c [platform][stm32f7xx] fix crash time console problem with the uart 2015-12-08 17:34:44 -08:00
Travis Geiselbrecht
75fb9e7f26 [arch][mips] allow the platform to select a particular mips implementation 2015-12-08 14:20:37 -08:00
Travis Geiselbrecht
a0e342dbbd [arch][mips] configure the timer more generically 2015-12-04 18:53:24 -08:00
Travis Geiselbrecht
a36b8f928a [platform][qemu-mips] add interrupt controller support and interrupt drive uart rx 2015-12-03 17:17:56 -08:00
Travis Geiselbrecht
434f7b12f6 [arch][mips] get the architectural timer working 2015-12-02 18:34:43 -08:00
Travis Geiselbrecht
38a5e7bd4f WIP more work on mip 
got interrupts working
started work on timer
 2015-12-01 19:19:23 -08:00
Travis Geiselbrecht
cd5ac2f34e WIP mips: first semi-functional mips port 
Context switches work, console alive. No interrupts.
 2015-12-01 01:05:37 -08:00
Travis Geiselbrecht
f5ff5fcfd3 WIP: mips32 on qemu 2015-11-30 18:57:37 -08:00
Eric Holland
0cc813cdf2 [target][dartuinoP0] GPIO definition and LED init 2015-11-25 14:14:50 -08:00
Travis Geiselbrecht
3815f70749 [platform][stm32f7xx][uart] add support for more than one active uart 
At the moment still only has hard coded bits for uart 1 and 3. Things
are declared in a wonky way to avoid allocating large structures unnecessarily.
 2015-11-25 14:14:50 -08:00
Eric Holland
541754a397 [target][dartuinoP0] Dartuino bringup. New target. 2015-11-25 14:14:21 -08:00
Zhu, Bing
6216532654 [arch][x86][x64][fpu]fix compile failure when X86_WITH_FPU is not defined. 
With this patch, no compile failure issue when either X86_WITH_FPU not defined
or defined as 0(1).

Signed-off-by: Zhu, Bing <bing.zhu@intel.com>
 2015-11-25 13:36:04 -08:00
Travis Geiselbrecht
5360a550c1 [platform][stm32f7xx][usbc] add driver for FS usb controller 2015-11-19 15:29:05 -08:00
Travis Geiselbrecht
367da75f12 [platform][stellaris] fix usbc driver for new changes in api 2015-11-19 15:29:05 -08:00
Travis Geiselbrecht
55679a4816 [platform][stm32f7xx] mass reformat ST's code 
Normally I wouldn't do this, but the formatting was so atrocious on
the STM32F7xx_HAL code that it was impossible to read.

Ran all the code through ./scripts/codestyle.space
 2015-11-19 14:45:27 -08:00
Travis Geiselbrecht
527c0dbc54 [merge] merge of spifs work by gkalsi 2015-11-17 13:11:27 -08:00
Gurjant Kalsi
01ea7bc7a3 [qspi][stm32f7xx][spiflash] Fix the logic for reading pages on the boundary between 24bit addrs and 32bit addrs. 2015-11-11 17:31:14 -08:00
Gurjant Kalsi
d9a97e7c0d [bio][flash] Added bio ioctl to return memory mapped address without putting the device into linear mode 2015-11-11 15:31:54 -08:00
Travis Geiselbrecht
420c557c6e WIP fpu bits 2015-11-09 16:30:16 -08:00
Zhu, Bing
b6647f5bef [arch][x86][fpu]Change naming convention for FPU flag 
To align with lk/arm flag naming convention, FPU flag
ENABLE_FPU is changed to X86_WITH_FPU

Signed-off-by: Zhu, Bing <bing.zhu@intel.com>
 2015-11-09 22:14:11 +08:00
Travis Geiselbrecht
9c69b36411 [arch][microblaze] fix the microblaze port 
Apparently stumbled into some sort of linker bug with gc-sections enabled.
Disable for now, and clean up the linker script a little bit.
 2015-11-07 02:48:05 -08:00
Travis Geiselbrecht
5030e3e8c8 [platform][pc] mass reformat of pc platform to space indents 
used ./scripts/codestyle.space
 2015-11-06 19:32:51 -08:00
Travis Geiselbrecht
c6b6a22cdd [platform][pc] change the default heap implementation for PC to dlmalloc 2015-11-06 19:32:51 -08:00
Bing Zhu
60c8eb2e56 [arch][x86_64][mmu] fix virtual addr and physical addr validity check 
Canonical address is meaningful only for VIRTUAL address, for physical
address, just check max supported address reported by CPUID capability.
 2015-11-05 16:52:03 -08:00