Commit Graph

185 Commits

Author SHA1 Message Date
Travis Geiselbrecht
72112c0676 [pci] little bit of code cleanup in the pci bus driver
Mostly just suggestions by clang-tidy. No functional change.
2025-09-23 23:16:55 -07:00
Travis Geiselbrecht
e50948bf06 [dev][virtio-block] fix a printf formatting warning on 32bit
ssize_t is annoying with formatting, since %zd doesn't really know how
to match it, so the usual strategy is to use %ld, since ssize_t is
always defined as a signed long on LK.
2025-08-31 12:41:30 -07:00
Kelvin Zhang
af1f19a2cc [lib][uefi] Add interrupt based async IO support
Add a new API to bio layer(read_async) where function will
return immediately, and a callback function will be called from
interrupt context, when block driver completes the IO request.
2025-08-13 16:13:38 -04:00
Alex Richardson
d22534704d pci: remove write-only variable
This is not used anywhere so just drop it.
2025-01-07 22:28:07 -08:00
Travis Geiselbrecht
6f24850de8 [dev][arm-generic-timer] print initialization configuration
This may be unsafe if the platform hasn't initialized a uart or console
by the time this is run. May need to revert or change this if it's an
issue.
2024-08-11 12:18:32 -07:00
Travis Geiselbrecht
6fd2626359 [dev][uart][pl011] switch configuration to a structure
This should be a bit easier to deal with going forward.
2024-08-09 18:20:30 -07:00
Travis Geiselbrecht
21bc71d8a2 [dev][uart][pl011] add defines for the bits that are used 2024-08-09 18:05:35 -07:00
Travis Geiselbrecht
51bcea6525 [dev][uart][pl011] have the uart be data driven
Initialize the uart by passing in the base and irq, as well as a flag
specifying if it's the debug uart and should directly put data into the
console buffer (if present).
2024-08-09 18:05:35 -07:00
Travis Geiselbrecht
5fa540dd31 [dev][uart][pl011] first step moving pl011 driver out of qemu-virt-arm
No real functional change, but move the driver implementation out to a
separate place so it can be made to be platform independent.
2024-08-09 18:05:35 -07:00
Travis Geiselbrecht
bd423cad4d [lib][fdtwalk] skip scanning pci busses marked 'disabled' 2024-06-19 16:18:28 -07:00
Travis Geiselbrecht
e63c132f9c [dev][interrupt][plic] kick the max irqs to 256
Will need to figure out a cleaner way of doing this, but for now just
keep increasing the size.
2024-06-17 00:45:20 -07:00
Travis Geiselbrecht
ea425e5473 [dev][gicv2] switch all of the register accessors to mmio_*
This fixes a bug when trying to start on qemu + kvm on an arm host.

A few minor fixes as suggested by clang tidy.
2024-06-04 20:28:03 -07:00
Travis Geiselbrecht
2f98fbf772 [pci][fdt] do not attempt to configure PCI with 64bit bars on a 32bit system
Especially in the case where the 32bit system doesn't have an MMU, avoid
using any high addresses for BARs.
2024-05-09 22:18:19 -07:00
Travis Geiselbrecht
9a4fae0714 [warnings] remove some extraneous __PACKED attributes
Also remove a few extra data structures that were marked packed but not
otherwise used anywhere.
2024-04-19 00:07:49 -07:00
Cody Wong
2b02c8a046 [virtio][v9p] Add the VirtIO 9p device driver
This commit adds the VirtIO 9p device driver based on the VirtIO driver
stack in LK, `dev/virtio`. The driver supports a subset of 9P2000.L
protocol (https://github.com/chaos/diod/blob/master/protocol.md), which
is able to perform basic file operations (fread, fwrite, dirread, etc.).
The primary interface for sending and receiving the 9p messages is
`virtio_9p_rpc`, which is handy and scalable.

The driver is limited to communicate to the host with only one
outstanding 9p message per device due to the simplified driver design.
Basically that is enough for embedded environments when there is no
massive file IO.

Signed-off-by: Cody Wong <codycswong@google.com>
2024-04-01 23:09:30 -07:00
Travis Geiselbrecht
3288b15a39 [dev][virtio-net] sync feature bits with virtio v1.3
Add new feature bits for the net device
Since the new feature bits are >= 32, add support for reading higher
than 32bit feature words from the virtio mmio interface.
2024-03-20 00:26:58 -07:00
Travis Geiselbrecht
c3cf81a8d8 [dev][virtio-block] update defs to virtio v1.3
No real functional change, just update the list of features to v1.3 of
the spec.
2024-03-19 23:40:57 -07:00
Alex Richardson
6b29ec9223 [clang] Silence unused private member warning
We could also remove this variable, but it seems best to keep it to
retain the same struct layout.
2023-04-23 17:23:31 -07:00
Alex Richardson
99bf8f9c41 [clang] Fix -Wformat warnings
Use %hx for uint16_t instead of %hhx.
2023-04-23 17:23:31 -07:00
Travis Geiselbrecht
7c2c8d8e56 [dev][interrupt][riscv_plic] merge now 3 implementations of the same plic driver into one
Move a copy of the PLIC driver out of one of the platforms and make the
setup of the interrupt controller a bit more dynamic.
2023-03-09 23:09:32 -08:00
Pedro Falcato
93a8b45ada [bus][pci] Clarify device::assign_resource
The previous XXX comments were unnecessary as the spec defines the
bottom 3 bits as being hardwired and read-only.
2023-01-15 18:35:49 -08:00
Pedro Falcato
3b4dade91f [bus][pci] Disable IO and mem decoding around BAR enumeration
Disable IO and mem decoding around BAR enumation as described in the PCI
Local Bus specification. This behavior should be safer when messing
around BARs for BAR lengths.
2023-01-15 18:35:49 -08:00
Travis Geiselbrecht
b990ad7999 [dev][net][e1000] just added a few comments with device ids
Was fiddling with making it work on i219 based e1000s, which was not
easily fruitful. However, may as well check in some comments with some
ids.
2022-11-02 00:28:36 -07:00
Travis Geiselbrecht
2367686854 [make] add a way for a module to opt into additional warnings
Move -Wmissing-declarations and -Wmissing-prototypes into this bucket.
Opt in most of the core top level modules in the system. More to follow.
2022-10-23 23:16:48 -07:00
Travis Geiselbrecht
611bd1cba0 [bus][pci] ask for 4MB alignment when mapping the ecam
This helps any architecture that might have a better chance with using
large pages.
2022-10-21 23:47:47 -07:00
Travis Geiselbrecht
96231b132f [bus][pci] make the pci bus dump on bootup use a little less horizontal space
Should fit better on an 80 column display
2022-10-19 00:24:10 -07:00
Travis Geiselbrecht
3a6c4aed8f [bus][pci] do not automatically initialize the bus manager in pci_init_legacy
This lets the caller do any last minute resource set up before starting
the bus manager. Is consistent with the way pci_init_ecam() works.
2022-10-18 23:58:18 -07:00
Michael Bishop
f4b2fa9a6b [dev][power][psci] refactor out of the qemu-virt-arm module 2022-09-25 18:14:50 -07:00
Wencheng Yang
853bce759d [dev][bus][pci] fixed type1_read_byte API bug
It should invoke type1_read_byte() rather than type1_read_half.
2022-08-11 23:33:15 -07:00
Travis Geiselbrecht
62e2e7dba0 [platform][pc] move the multiboot header into generic space
Share the header with arch/x86 code
Clean up the use of the boot flags
Add code to print the framebuffer information, if present
2022-08-07 23:04:23 -07:00
Travis Geiselbrecht
914c9c2a2f [dev][virtio-blk] update to newer version of the device
Nothing fundamentally changed, just update to new feature bits and print
them at device detection time.
Try to negotiate the guest feature set as well, though nothing
fundamentally changes at this time.
2022-04-26 00:40:03 -07:00
Travis Geiselbrecht
b834181637 [dev][virtio-block] fix bug when not using paging
In the non VM path the existing routine wouldn't subtract from len, so
the function would (properly) return bytes transferred instead of zero.

The wrapping code was written to assume 0 and not bytes transferred,
which seemed like a workaround for broken code. Change the inner routine
to always return bytes transferred and adjust wrapper routines
accordingly.
2022-04-25 23:37:39 -07:00
Travis Geiselbrecht
6ad3643165 [lib][minip] add an arg to the ethernet transmit callback
Already had the registration hook for it, but was never used.
2022-03-19 15:06:57 -07:00
Travis Geiselbrecht
fe28bd8a95 [lib][minip] add a mechanism to wait for the stack to be configured
Configured in this case means an ip address assigned and a nic
installed.
2022-03-19 14:46:01 -07:00
Travis Geiselbrecht
e555db5bda [bus][pci] at least register that MSIX is available
Doesn't yet have support for it, but set the bool and remember it was
present when scanning devices.
2022-02-27 19:36:59 -08:00
Travis Geiselbrecht
979cebecf2 [bus][pci] Make sure there's a fallback range in release mode 2022-02-06 20:50:24 -08:00
Travis Geiselbrecht
f1431b81d0 [bus][pci] Support for dynamically assigning BARs and bridges if needed
In the case of platforms where a bios or firmware has not already
assigned all the resources, do so. Requires the platform supply one or
more ranges of physical address space and IO that can be mapped into
BARs.

Handles iterating through bridges, computing the sizes of all the
peripherals downstream and rolling that up as well.
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
36e73e0fac [bus][pci] add routines to pass in PCI bus resources prior to starting the pci bus manager
Wire them up on arm and riscv which need them. x86-pc does not, so dont
call it.

Also fix a few miscellaneous bugs, notably PCI not detecting 64bit bars
properly due to an off by one bit error.
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
d5f394859d [bus][pci] first stab at assigning bus numbers to unconfigured bridges
Had to rearrange the proble logic somewhat, but now the bus manager will
assign consequtive bus numbers as it finds bridges and recursively
drills down to discover the entire bus structure.

Does not assign resources yet, but need to do this in the first pass
to find all of the devices before can figure out how much space they
occupy.
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
ba21aa9236 [bus][pci] quick hack to not dive into bridges that appear unconfigured
This fixes an infinite recursion where it was stepped into bridge a
bridge that has the secondary bus set to 0, which caused it to start
over and probe bus 0 until it blew the stack.

Better fix is to actually assign busses.
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
07f847e38a [bus][pci] add accessors for bridge ranges and print on dump 2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
95443413e8 [bus][pci] break the bus manager file into separate cpp files per object
No functional change aside from rearranging things.
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
5e92f0adf7 [bus][pci] move the bus manager code into a subdir 2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
ef8d252a8a [bus][pci] load BARs for bridges as well
Dump them in the pci dump
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
ef67d619a5 [bus][pci] load bars for devices even if their address is 0
Probe the size first, and if that turns up anything, mark the bar as
valid, even if the address is set to 0. The address can be configured in
a later pass of the bus manager.

Also print the bars on boot.
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
2ab1af0bf3 [bus][pci] add a virtual module that references all the pci drivers
Not sure if this is the right way to go forward, but it at least keeps
from having to copy/paste the same module list in a few different
places.
2022-02-06 19:46:39 -08:00
Travis Geiselbrecht
91d5c67fc2 [platform][qemu-virt] make sure the PCI bus builds properly
Implement stubbed out versions of the msi allocation routines.

Add a stubbed out routine to allocate MSI vectors.
2022-02-06 19:46:05 -08:00
Travis Geiselbrecht
0679f91b9a [dev][net][e1000] only build with platforms with the VM enabled 2022-02-06 16:30:47 -08:00
Travis Geiselbrecht
2205aa54dc [dev][e1000] fail to start if the pci bars have not been configured 2022-02-06 15:58:28 -08:00
Travis Geiselbrecht
278c551821 [dev][pci] read and cache BAR sizes at probe time
Since probing the size of a BAR requires writing and reading back from
the address field, do it at probe time and cache the data instead of at
api time. This should avoid fouling up any mmio transactions in flight.
2022-01-11 01:24:17 -08:00