Commit Graph

43 Commits

Author SHA1 Message Date
Travis Geiselbrecht
1a761abb83 [arch][arm] Add support for float/nofloat compile options
Was already added to arm64, but arch/arm hadn't picked up this feature
yet. Uncovered a few places here or there that wasn't marking code as
float/no-float, but this fixes a problem where newer compilers are
starting to sneak in vector code because they can.

Issue #406
2024-05-14 00:57:19 -07:00
Travis Geiselbrecht
d3cd5be13e [arch][ops] define some global ARCH macros to be a bit more scoped
Instead of ICACHE/DCACHE/UCACHE, add the ARCH_CACHE_FLAG_ prefix to be a
little cleaner and not collide with anything else.

No functional change.
2024-05-09 19:28:56 -07:00
Frank Dischner
5e69cd930d [arch][arm-m] simplify context switch
The context switch is now always performed inside the PendSV handler,
which greatly simplifies the code by reducing all switches to a single
path. This should also eliminate any race conditions during the switch.

Because we always enter PendSV for a switch, there is a slight
performance penalty in the case of switching from a non-preempted thread
to another non-preempted thread (~40 cycles longer on an M4, compared to
the previous implementation)
2024-02-26 00:58:04 -08:00
Travis Geiselbrecht
c2574c46c6 [arch][arm-m] add logic to conditionally set VTOR if present
VTOR is optional on cortex-m0+, so let the platform or target set
a define to do it.

Move the RP20xx platform to this switch.
2021-02-15 21:06:05 -08:00
Travis Geiselbrecht
f7d8e2300c [warnings] add -Wshadow which helps detect local variables that override globals
Nothing particularly bad showed up but cleaned up a bit of code.
2020-07-25 16:49:25 -07:00
Travis Geiselbrecht
cba9e47987 [license] replace the longer full MIT license with a shorter one
Used scripts/replacelic. Everything seems to build fine.
2019-07-05 17:22:23 -07:00
Travis Geiselbrecht
d8fa82cb91 [formatting] run everything through codestyle
Almost nothing changes here except moving braces to the same line as the
function declaration. Everything else is largely whitespace changes and
a few dangling files with tab indents.

See scripts/codestyle
2019-06-19 21:02:24 -07:00
Travis Geiselbrecht
1b7a28efb8 [include][lk] fixup lk/ include path move 2019-06-19 19:46:11 -07:00
Travis Geiselbrecht
a8d82f3ab0 [arch][arm-m] move some hand coded register inits to the CMSIS struct
No functional change.
2019-06-12 14:26:48 -07:00
Travis Geiselbrecht
8c506eba61 [arch][arm] fix up the cortex-m fpu code to build again on all three combinations of arch/fpu
cortex-m0 with no fpu and limited instructions
cortex-m3+ with no fpu
cortex-m4/m7 with fpu

Untested if this still works.
2016-03-28 19:57:17 -07:00
Travis Geiselbrecht
f92aad2622 [merge] merge master into the cortex-m fpu working branch 2016-03-28 19:09:40 -07:00
Gurjant Kalsi
1458330c8b [arch][arm-m] Implement quiesce and chain load for arm-m 2016-03-09 15:21:04 -08:00
Travis Geiselbrecht
2eb32a4369 [style] mass reformat all the non external code to 4 space indents
Ran everything through scripts/codestyle.space, which uses astyle
to generally follow K&R style.

Biggest non whitespace change is pulling brackets down on function
declarations, which I'm pretty ambivalent about, but astyle insists
on taking a stance
2016-02-14 12:24:01 -08:00
nqbit
dd8dd061b8 [arch][arm] changes to support cortex-m0plus architecture 2016-01-18 11:07:31 -08:00
Eric Holland
3d7e1f4968 [arch][arm] changes to support cortex-m0 architecture 2016-01-17 17:35:06 -08:00
Travis Geiselbrecht
dd29481ba0 [arch][arm-m] set target debug led 1 when inside irq handler 2015-12-14 15:20:25 -08:00
Travis Geiselbrecht
6475660350 WIP checkpoint 2015-11-11 13:22:07 -08:00
Travis Geiselbrecht
420c557c6e WIP fpu bits 2015-11-09 16:30:16 -08:00
Travis Geiselbrecht
6a9df9aaed [arch][arm] mass reformat all files to space indention
Used scripts/codestyle.space on .c and .h files
Manually converted .S files
2015-11-09 14:34:29 -08:00
Travis Geiselbrecht
9118a4d605 [merge] merge from the stm32f7 branch
Conflicts:
	arch/arm/arm-m/arch.c
2015-08-28 15:03:17 -07:00
Travis Geiselbrecht
b1024ec276 [arch][arm-m] add cache flush routines for cortex-m cpus that support it 2015-08-21 11:33:05 -07:00
Brian Swetland
f231bf893a [arch][arm-m] provide _debugmonitor hook 2015-08-05 14:49:03 -07:00
Travis Geiselbrecht
88c923d88f [arch][arm-m] add support for m7 cache, add memory barrier in systick driver
The memory barrier is needed to order the reading of the val register to ensure
it is read properly on M7 cores.
2015-07-10 00:50:05 -07:00
Travis Geiselbrecht
a7cf45aad7 [arch][arm-m] fix cortex-m code post SMP
At the top of each irq handler, make sure PRIMASK is set to 1, so
that arch_ints_disabled(), which is now used by the spinlock code,
returns the appropriate value. On Cortex-M this is not exactly the
same thing as having irqs disabled, but it's the easiest thing to
query as long as the model of only having one level of irq handler
is maintained.
2015-06-03 17:44:46 -07:00
Travis Geiselbrecht
e2f65c93cf [arch][arm-m] fix arm-m after SMP changes 2015-03-10 16:43:55 -07:00
Travis Geiselbrecht
ee9d2927ad [arm] add ability to pass and generically read up to 4 boot args from whoever loaded lk
-Extend arch_chain_load() to pass 4 args
2014-11-21 15:50:18 -08:00
Travis Geiselbrecht
ec69757a59 [arch] relocate binary to proper physical location at boot, add arch_chain_load
-in arm start.S, calculate and move the current binary to the proper physical
location before enabling the mmu.
-add arch_chain_load which does the necessary translations from virtual to
physical, tries to gracefully shut the system down, and branches into the loaded binary.
2014-08-12 16:21:27 -07:00
Travis Geiselbrecht
25a78c5225 [lib][heap] have the heap pull pages out of the vm, if present 2014-07-11 18:11:58 -07:00
Travis Geiselbrecht
684cde6c03 [arch][arm-m] refactor systick code into separate module
Add generic support for running systick in monotonic mode and providing
current_time() routines.

Platforms may choose not to use this, thus it is moved into an optional
module.
2014-03-18 19:43:11 -07:00
Travis Geiselbrecht
616a4d5066 [arch][arm-m] fix the arm_cm_priority routines to return values in the right range
NVIC_SetPriority and friends actually expect values from 0-N where N is
the max priority based on number of implemented bits (usually 7, for 3
bits).

Fix this, which actually fixes a rare bug where the systick interrupt
would preempt a regular irq.
2014-03-05 12:53:24 -08:00
Travis Geiselbrecht
5cba55e27d [arch][arm-m] add irq number to KEVLOG on irq entry/exit 2013-07-19 18:52:28 -07:00
Travis Geiselbrecht
aa23e27911 [arch][arm-m] properly set all NVIC priorites to medium 2013-07-15 21:36:19 -07:00
Travis Geiselbrecht
d36b762ea8 [arch][arm-m] add generic header/footer for arm-m handlers 2013-03-10 17:53:37 -07:00
Travis Geiselbrecht
9297b60380 [arch][arm-m] rename all the cm3_* functions to arm_cm_* to be consistent
The cm3_ routines apply to more than cortex-m3 anyway, so get rid of the m3.
2013-03-10 17:53:37 -07:00
Travis Geiselbrecht
8d89c952b4 [arch] rearrange ops.h
-have the top level ops.h declare static routines
-arch specific ops.h can override with inlines or pass the
call through to hard implementation routines.
2012-12-27 18:35:55 -08:00
Travis Geiselbrecht
280ce21fc2 [arch][arm-m] add support for cortex-m4 and cortex-m4f
-This will break platforms, since it renames a few cm3.h style
headers to cm.h
2012-11-11 20:08:50 -08:00
Travis Geiselbrecht
02bb81253e [arch][arm-m] wfi in the idle loop 2012-11-06 19:25:56 -08:00
Travis Geiselbrecht
bb5e3d40d8 [arch][arm-m] make number of priority levels hard coded
-Turn off the dynamic priority calculation so we can much more efficiently
set different levels. All arm-ms support at least 3 bits of priority,
so default to that.
2012-10-27 16:31:28 -07:00
Travis Geiselbrecht
1f2fd10de4 [arch][arm-m] add new version of CMSIS lib v3.0.1 2012-09-20 13:30:26 -07:00
Travis Geiselbrecht
fa1ce2026b [arch][arm-m] enable the cortex-m3's cycle counter 2012-05-30 20:25:51 -07:00
Travis Geiselbrecht
9ef4e385fa [arm-m] add simple systick driver 2012-05-10 18:59:29 -07:00
Travis Geiselbrecht
1286b6b149 [arch][arm] ARM-m threading support 2012-04-23 15:52:29 -07:00
Travis Geiselbrecht
d09b83ceef [arm][arm-m] start filling out more of the arm-m architecture 2012-03-17 17:32:52 -07:00