In a two segment binary was previously trying to use MAXPAGESIZE set to 4
to cram the sections in very tight for embedded. This seemed to with this
toolchain cause the linker to get confused and sometimes appear to stuff in
an extra 4 bytes in the output file, thus misaligning the data segment.
It's possible it's still a bug on my side in the linker, but setting
max_page_size to 8 seems to work around it for now. Possible there's some
implicit 64bit aligning slipped in a stage somewhere in binutils thats
causing it to get confused. Either way, 8 byte alignment is no large loss
here.
Refactor the two linker scripts to put .sdata at the end of the data segment
and .sbss at the start of the bss segment to try to maximize the reach of
the global pointer.
Also generally tries to clean up and align the two linker scripts as a new
golden standard for other architectures.
Start using PHDRS and MAXPAGESIZE, remove some extraneous stuff.
Possible we can combine a lot of these linker scripts for various arches
if we're careful.
Support mp lk start on RISC-V. Several changes throughout were required:
- Add signal in asm start to force secondary harts to wait for bss to be
cleared.
- Use mhartid in arch_curr_cpu_num, PLIC, and CLINT
- Use tp register as thread pointer instead of global variable.
- Support sending IPIs between harts using CLINT
- Add spinlock implementation
Very little needed to port except to conditionalize some assembly in the
context switch and exception code. Mostly needed to move build system
stuff around and add a new project.
The virt machine is a generic target, much like the arm virt machine.
Intended to be simple to use and a good target to run large systems like
linux on. At the moment simply support booting and simple uart and timer
support.
