-fix gpio_config, switch usart1 config to this api, move into target code
-switch to just including platform/stm32.h which gets all of the HAL apis
-redo the interrupt driven rx side of usart to be much simpler and directly
push into the cbuf without using most of the HAL goo.
-reformat for 4 spaces
+ When setting GPIOs, the MASK_DATA registers are used. Code was
properly computing which register to use based on register index
(either LSW or MSW), but was improperly computing the mask/value to
set when the GPIO to be manipulated existed in the upper 16 bits
(the shift needed to be offset by 16 bits and was not).
+ Do not manipulate things like the IO driver type, drive speed, and
so on when enabling/disabling the pullup in the SLCR registers.
Previously, whenever a GPIO was being configured, the SLCR register
was being set to be 1.8v LVCMOS, and having the DISABLE RCV bit set.
Things like the IO type have been set by the platform and should not
be manipulated by the GPIO driver. Now, the GPIO code leaves those
bits the way they were configured, and changes only the PULLUP bit
as well as the 4 levels mux bits (arguably, it should not even
change the mux bits; it is the platform's job to properly mux the
pins).
+ Address an issue with the subtle (undocumented) difference between
the DIRM and the OEN bits when configuring for input vs. output.
Please read the extensive comment in the code for details.
Change-Id: I160069eeef92b1cf0763274ccb64c5d14744f563
Signed-off-by: John Grossman <johngro@google.com>
- GEM now supports asynchronous scatter-gather queuing and properly handling
pktbuf ownership
- General stack cleanups in Minip
- pktbufs now grab buffers from the user, or from a preallocated pool
Punched out a version of the microblaze on a ZYBO dev board, which required
a few tweaks an additions to run on real hardware.
Refactored the qemu and zybo microblaze target.
or1ksim is the "golden reference" simulator for the or1k
architecture, but the configuration used in this simple setup
is commonly used on other targets, so it could serve as a good
starting point for those as well.
Included is also a configuration file with uart and ethernet
peripherals defined, which of only the uart is supported.
The qemu target has 128KB of ram at 0 and the rest at 0x90000000.
Split the binary so that the vector table lives at 0 and everything else in
the high address.
-Add a few global #defines: ZYNQ_CODE_IN_SDRAM and ZYNQ_SDRAM_INIT which
are used in a few places to initialize or not initialze dram and affect
the way the VM is brought up.
-Add zybo-dram-test project
Some but not all zybo based projects will want to share some higher
level initialization code, so move that to app/zybo-common and make
the zybo target a bit more bare-bones.
