7 Commits

Author SHA1 Message Date
Travis Geiselbrecht
7c2c8d8e56 [dev][interrupt][riscv_plic] merge now 3 implementations of the same plic driver into one
Move a copy of the PLIC driver out of one of the platforms and make the
setup of the interrupt controller a bit more dynamic.
2023-03-09 23:09:32 -08:00
Travis Geiselbrecht
6ea6256d89 [platform][sifive] add switch to scripts/do-riscvqemu to run sifive unleashed
Also fix up some broken bits on the previously unused qemu-sifive-u target.
2020-12-30 01:40:05 -08:00
Travis Geiselbrecht
1e50428091 [arch][riscv] remove the last of the RISCV_BOOT_HART mechanism
Now the harts are dynamically numbered, so don't need
this mechanism anymore.
2020-12-30 01:09:24 -08:00
Travis Geiselbrecht
dc1cfc0b33 [target][sifive-unleashed] get working on a physical sifive unleashed
Only tested with SBI and supervisor mode, but that's all I have now.

Add checked in copies of the device tree needed for a uboot uimage
needed to start it.
2020-03-28 20:33:04 -07:00
Elliot Berman
e50d7db612 [arch][riscv] Add support for running in supervisor mode
Add support for running LK in supervisor mode or machine mode.
- Macro-ify CSR access to use correct CSR # or use SBI call as req'd
- Add support to make SBI calls
- Split CLINT and lk timer abstraction so that RISC-V timer can use SBI
  as required.
- Add support for booting other harts as primary since hart0 on U540
  does not support S-mode. A map is used to get LK cpu number from
  hartid.
2020-01-16 23:06:28 -08:00
Elliot Berman
acfe991c7f [arch][riscv] Expose RISC-V mp kernel start
Support mp lk start on RISC-V. Several changes throughout were required:
- Add signal in asm start to force secondary harts to wait for bss to be
  cleared.
- Use mhartid in arch_curr_cpu_num, PLIC, and CLINT
- Use tp register as thread pointer instead of global variable.
- Support sending IPIs between harts using CLINT
- Add spinlock implementation
2020-01-16 23:06:28 -08:00
Elliot Berman
d239adf839 [arch][riscv] Add basic support for SiFive HiFive Unleashed
Most of changes were moving around where macros were defined, plus the
following:
- Remove requirement for floating point on RV64 to support booting
  monitor core on U54 SoC.
- Add support for Debug LEDs on HiFive Unleashed Board
2020-01-16 23:06:28 -08:00