1 Commits

Author SHA1 Message Date
Travis Geiselbrecht
c66ad44efa WIP [target][visionfive2] Add initial support for a VisionFive 2 RISC-V board
Still TODO:
-Set the timer rate properly
-Fix nonzero based hart secondary cpu boot
-Try to parse the device tree for some information
2023-03-06 01:06:27 -08:00