12 Commits

Author SHA1 Message Date
Travis Geiselbrecht
de29964f7c [platform][zynq] tweak to build at lower optimization levels
For some reason this particular sequence isn't picked up as a warning
unless you're compiling with -O1 or below.
2020-05-16 14:29:21 -07:00
Travis Geiselbrecht
cba9e47987 [license] replace the longer full MIT license with a shorter one
Used scripts/replacelic. Everything seems to build fine.
2019-07-05 17:22:23 -07:00
Travis Geiselbrecht
d8fa82cb91 [formatting] run everything through codestyle
Almost nothing changes here except moving braces to the same line as the
function declaration. Everything else is largely whitespace changes and
a few dangling files with tab indents.

See scripts/codestyle
2019-06-19 21:02:24 -07:00
Travis Geiselbrecht
1b7a28efb8 [include][lk] fixup lk/ include path move 2019-06-19 19:46:11 -07:00
Travis Geiselbrecht
2eb32a4369 [style] mass reformat all the non external code to 4 space indents
Ran everything through scripts/codestyle.space, which uses astyle
to generally follow K&R style.

Biggest non whitespace change is pulling brackets down on function
declarations, which I'm pretty ambivalent about, but astyle insists
on taking a stance
2016-02-14 12:24:01 -08:00
Travis Geiselbrecht
307628f29b [platform][zynq] add watchdog driver
-use lib/watchdog to manage the hardware watchdog driver
-set the default timeout to 1 second, pet at 500ms intervals

Change-Id: I04d23313083e4715791e197d4a50f319df9916aa
2015-05-20 23:31:39 -07:00
Travis Geiselbrecht
e3348a4df0 [platform][zynq] print fpga clocks even if they're not enabled 2014-08-29 17:59:56 -07:00
Chris Anderson
c0385aecbe [zynq] Move SLCR access to a struct layout, update clock interface 2014-07-31 00:49:34 -07:00
Travis Geiselbrecht
caaa527172 [platform][zynq] update clock setting api, print boot reason 2014-05-30 17:02:49 -07:00
Travis Geiselbrecht
3e4797c960 [platform][zynq] update clock routines to lock/unlock 2014-05-29 18:51:00 -07:00
Travis Geiselbrecht
bdb5addd5b [platform][zynq] initial implementation of some clock routines
-Mostly introspection at this point
-Move target specific jam table to early platform init
2014-05-29 18:24:55 -07:00
Travis Geiselbrecht
3a463d272d [platform][zynq] interrupt driven uart rx 2014-04-21 01:19:22 -07:00