- Move a bit of the shared logic of secondary bootstrapping into a new
function, lk_secondary_cpu_entry_early() which sets the current cpu
pointer before calling the first half of the secondary LK_INIT
routines.
- Create the per cpu idle threads on the main cpu instead of the
secondary as they come up.
- Tweak all of the SMP capable architectures to use this new path.
- Move the top level mp routines into a separate file top/mp.c
- A bit more correctly ifdef out more SMP code.
- Make the secondary entry point be logically separate function, though
declared in the same file.
- Add a trick where the kernel base + 4 is the secondary entry point.
Not really useful except makes it easy to compute the offset
elsewhere.
- Changed the entry point to arm64_reset and move _start to the linker
script, which is what most other arches do.
- While was in the linker script, make sure the text segment is aligned
on MAXPAGESIZE, though doesn't make any real difference currently.
- Generally clean up the assembly in start.S with newer macros from
Fuchsia, and avoid using ldr X, =value as much as possible.
- Fix and make sure arm64 can build and run with WITH_SMP set to false.
Add a new no-smp project to test this.
Note this will likely break systems where all of the cpus enter the
kernel simultaneously, which we can fix if that becomes an issue.
Secondary code now completely assumes the cpu number is passed in x0.
This can be emulated with platform specific trampoline code if it needs
to that then just directs into the the secondary entry point, instead of
trying to make the arch code have to deal with all cases.
- Add a percpu structure for each cpu, akin to x86-64 and riscv. Pointed
to by x18, which is now reserved for this in the kernel. Tweaked
exception and context switch routines to leave x18 alone.
- Remove the cpu-trapping spinlock logic that is unused in mainline,
probably. (Can add a new version of it back if it's necessary).
- Switch fdtwalk helper to using the newer, cleaner way of initializing
secondaries using the PSCI CPU_ON argument that should be pretty
standard on modern implementations. (Possibly an issue with old
firmware).
- Remove the notion of computing the cpu ID from the Affinity levels,
which doesn't really work properly on modern ARM CPUs which more or
less abandoned the logical meaning of AFFn.
- General cleanup of the driver a bit
- Aadd a boot time message that prints the version
- Add the argument field to CPU_ON
- Pass the cpu number through from fdtwalk library
- X86 cpuid feature list dump was using the wrong array and walking off
the end of one.
- GICv2 code had a left shift by up to 31 of an integer. Needs to be
unsigned.
- PLIC same as GIC code.
- fdtwalker code should be using a bytewise accessor based helper
function for reading large integers out of an unaliged FDT.
- PCI BIOS32 search code could do a 32bit unaligned read of a string,
switch to using memcmp.
Instead of one large routine that takes a list of optional callbacks,
build some helper routines that do the work that a few platforms have
implemented on their own to share some code between them.
Future enhancements: move some of the helpers out of this library into
the library that implements the thing it's helping with (ie, PCI
bringup, bootstrapping arch specific cores). For now just leave them in
helper.cc which is conditionally compiled.
FDT encodes the range of available mmio and io ports that the PCI bus
can use to map bars. Return this information out of the FDT walker
helper routines to feed into the PCI bus manager in the future.