- Move a bit of the shared logic of secondary bootstrapping into a new
function, lk_secondary_cpu_entry_early() which sets the current cpu
pointer before calling the first half of the secondary LK_INIT
routines.
- Create the per cpu idle threads on the main cpu instead of the
secondary as they come up.
- Tweak all of the SMP capable architectures to use this new path.
- Move the top level mp routines into a separate file top/mp.c
- A bit more correctly ifdef out more SMP code.
While waking up all threads from wait-queue, order should
start from tail to maintain correct scheduling sequence.
Signed-off-by: Mahavir Jain <mahavirpj@gmail.com>
Port to the really neat 68010 based board at https://rosco-m68k.com/
Port Features:
-10Mhz 68010
-1MB ram
-Dual UART + timer implemented as a 68c681 chip
-timer running at 1Khz, UART A for console
-interrupt driven RX support
Some amount of extending of the 68k exceptinon code was needed to
support the autovectored irqs that the 68681 uart uses. Added build
system support for 68010.
This will allow in the future multiple instances of it to be active at
at a time. Place the current console in a new TLS slot per thread so
threads created as a side effect of console commands can properly run
commands.
In a previous patch, on architectures where SMP is disabled,
thread_pinned_cpu() will always return a negative number. GCC 10.2
is somewhat more aggressive about negative shift values so it wasn't
detecting that the second path of an if statement is never taken.
Solution is to cache the pinned cpu value and use it for both the
test and the operation.
This change ensures that during thread scheduling
only needed cores are woken up as per the thread's
CPU affinity rather than all cores. This would avoid
un-necessary wakup for other cores from lower power
states without having to execute anything.
Signed-off-by: vannapurve <vannapurve@google.com>
Replace the body of the MIT license with a reference to the LICENSE file
and a URL with the MIT license. Replaces 20 something lines with 3.
No functional change.
Almost nothing changes here except moving braces to the same line as the
function declaration. Everything else is largely whitespace changes and
a few dangling files with tab indents.
See scripts/codestyle
Currently targets qemu's sifive_e machine, which is a split flash/ram
machine, much like the Sifive HiFive1. Untested as of yet on a real
HiFive1.
Basic support including interrupts and architectural timers in place.
Generically add support for more than one user address space,
attach to a thread, and context switch as thread swaps happen.
Add support for ARM and ARM64, and stub out support for x86 platforms.
Ran everything through scripts/codestyle.space, which uses astyle
to generally follow K&R style.
Biggest non whitespace change is pulling brackets down on function
declarations, which I'm pretty ambivalent about, but astyle insists
on taking a stance
Hopefully to nothing...
- remove current/pinned cpu tracking in thread struct
- macroize access to current/pinned cpu tracking
- empty-inline/remove vestigial mp_* bits in UP builds
Use the reserved cortex-m vectors 8 and 9 for a magic cookie and
pointer to a debugger info structure. This structure contains
pointers to the threadlist, the current thread pointer, and
offsets to important members of the thread structure. With
this information, an attached debugger can walk the threadlist
and obtain state, name, registers, etc for each thread.
Use global define WITH_DEBUGGER_INFO to enable this.
Allow setting the realtime flag on low priority threads to disable the
tick without also loosing ipi interrupts.
Change-Id: Ia30e4d20105a65945918fc996c3114c3852963a9
The existing runqueues are scanned on resched until a thread that is
not pinned to another cpu is found.
Per-pu runqueues can be added later to avoid this scan.
Change-Id: Idd7dbddb4b79ef38a0ccd0c42b53f8867020e6cd
Conflicts:
kernel/thread.c
The new priority of the thread may mean that a different thread should run.
Change-Id: Ia683613bb825929b506ea885c6ef303d9748c6a0
Signed-off-by: Arve Hjønnevåg <arve@android.com>
-Each cpu's idle thread now doesn't sit in the run queue and is only
selected when no other threads are ready to run. This means there is
now an implicit affinity for the idle threads for each cpu, and reduces
the amount of idle thread thrashing without real affinity (or per cpu
run queues).
-Fix some bitmap logic in the mp_reschedule and mp_mbx_reschedule_irq
code path that probably resulted in not enough reschedules.
-Change a few spots for mp reschedule ipis in general thread path. Add
ipi to thread_resume, remove one from thread_create_etc.
Thanks to a bug report by Arnab Basu, fixed the incorrect waking up of
thread_join waiters on the calling thread, instead of the thread being detached.
