- Move a bit of the shared logic of secondary bootstrapping into a new
function, lk_secondary_cpu_entry_early() which sets the current cpu
pointer before calling the first half of the secondary LK_INIT
routines.
- Create the per cpu idle threads on the main cpu instead of the
secondary as they come up.
- Tweak all of the SMP capable architectures to use this new path.
- Move the top level mp routines into a separate file top/mp.c
- A bit more correctly ifdef out more SMP code.
- General cleanup of the driver a bit
- Aadd a boot time message that prints the version
- Add the argument field to CPU_ON
- Pass the cpu number through from fdtwalk library
- X86 cpuid feature list dump was using the wrong array and walking off
the end of one.
- GICv2 code had a left shift by up to 31 of an integer. Needs to be
unsigned.
- PLIC same as GIC code.
- fdtwalker code should be using a bytewise accessor based helper
function for reading large integers out of an unaliged FDT.
- PCI BIOS32 search code could do a 32bit unaligned read of a string,
switch to using memcmp.
Most of the functions for this was declared in a top level lk/ include
space, so go ahead and move it there.
A few exceptions:
- Moved spin() over to platform/time.h and platform/time.c since the
function more logically belongs to platform/time.h. Any users of
spin() will need to update their headers to include platform/time.h
instead.
- Renamed spin_cycles() to arm_cm_spin_cycles() and moved over into
arm/cm.h since it is currently defined in arch/arm-m and only used for
targets that implicitly are for arm-m.
ssize_t is annoying with formatting, since %zd doesn't really know how
to match it, so the usual strategy is to use %ld, since ssize_t is
always defined as a signed long on LK.
Add a new API to bio layer(read_async) where function will
return immediately, and a callback function will be called from
interrupt context, when block driver completes the IO request.
Initialize the uart by passing in the base and irq, as well as a flag
specifying if it's the debug uart and should directly put data into the
console buffer (if present).
This commit adds the VirtIO 9p device driver based on the VirtIO driver
stack in LK, `dev/virtio`. The driver supports a subset of 9P2000.L
protocol (https://github.com/chaos/diod/blob/master/protocol.md), which
is able to perform basic file operations (fread, fwrite, dirread, etc.).
The primary interface for sending and receiving the 9p messages is
`virtio_9p_rpc`, which is handy and scalable.
The driver is limited to communicate to the host with only one
outstanding 9p message per device due to the simplified driver design.
Basically that is enough for embedded environments when there is no
massive file IO.
Signed-off-by: Cody Wong <codycswong@google.com>
Add new feature bits for the net device
Since the new feature bits are >= 32, add support for reading higher
than 32bit feature words from the virtio mmio interface.
Disable IO and mem decoding around BAR enumation as described in the PCI
Local Bus specification. This behavior should be safer when messing
around BARs for BAR lengths.
Nothing fundamentally changed, just update to new feature bits and print
them at device detection time.
Try to negotiate the guest feature set as well, though nothing
fundamentally changes at this time.
In the non VM path the existing routine wouldn't subtract from len, so
the function would (properly) return bytes transferred instead of zero.
The wrapping code was written to assume 0 and not bytes transferred,
which seemed like a workaround for broken code. Change the inner routine
to always return bytes transferred and adjust wrapper routines
accordingly.
In the case of platforms where a bios or firmware has not already
assigned all the resources, do so. Requires the platform supply one or
more ranges of physical address space and IO that can be mapped into
BARs.
Handles iterating through bridges, computing the sizes of all the
peripherals downstream and rolling that up as well.
Wire them up on arm and riscv which need them. x86-pc does not, so dont
call it.
Also fix a few miscellaneous bugs, notably PCI not detecting 64bit bars
properly due to an off by one bit error.
Had to rearrange the proble logic somewhat, but now the bus manager will
assign consequtive bus numbers as it finds bridges and recursively
drills down to discover the entire bus structure.
Does not assign resources yet, but need to do this in the first pass
to find all of the devices before can figure out how much space they
occupy.
This fixes an infinite recursion where it was stepped into bridge a
bridge that has the secondary bus set to 0, which caused it to start
over and probe bus 0 until it blew the stack.
Better fix is to actually assign busses.
