3 Commits

Author	SHA1	Message	Date
Travis Geiselbrecht	14bd7728a6	[arch][riscv][feature] add a few more feature bits ... These may be useful in the future.	2024-06-02 15:31:30 -07:00
Travis Geiselbrecht	b9c3603c59	[arch][riscv] fix typo matching against the zifencei feature	2024-06-02 14:51:53 -07:00
Travis Geiselbrecht	566b25d1ec	[arch][riscv] read the riscv feature string out of device tree ... Also added initial implementation of a way to query run time features of the cpu.	2024-06-01 17:21:01 -07:00