[bus][pci] Support for dynamically assigning BARs and bridges if needed

In the case of platforms where a bios or firmware has not already
assigned all the resources, do so. Requires the platform supply one or
more ranges of physical address space and IO that can be mapped into
BARs.

Handles iterating through bridges, computing the sizes of all the
peripherals downstream and rolling that up as well.
This commit is contained in:
Travis Geiselbrecht
2022-01-30 15:12:38 -08:00
parent 36e73e0fac
commit f1431b81d0
19 changed files with 1058 additions and 80 deletions

View File

@@ -8,6 +8,7 @@
#pragma once
#include <lk/compiler.h>
#include <stdbool.h>
#include <sys/types.h>
__BEGIN_CDECLS
@@ -31,11 +32,15 @@ void register_int_handler_msi(unsigned int vector, int_handler handler, void *ar
/* Allocate a run of interrupts with alignment log2 in a platform specific way.
* Used for PCI MSI and possibly other use cases.
*/
status_t platform_allocate_interrupts(size_t count, uint align_log2, unsigned int *vector);
status_t platform_allocate_interrupts(size_t count, uint align_log2, bool msi, unsigned int *vector);
/* Map the incoming interrupt line number from the pci bus config to raw
* vector number, usable in the above apis.
*/
status_t platform_pci_int_to_vector(unsigned int pci_int, unsigned int *vector);
/* Ask the platform to compute for us the value to stuff in the MSI address and data fields. */
status_t platform_compute_msi_values(unsigned int vector, unsigned int cpu, bool edge,
uint64_t *msi_address_out, uint16_t *msi_data_out);
__END_CDECLS