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[dev][interrupt][arm_gic] Add arm64 support

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Change-Id: I08b1f60af08fe3d8d20a9f85e8e8c03d78aa6aa8
This commit is contained in:
Arve Hjønnevåg
2014-11-10 17:08:29 -08:00
parent 5a25f43b90
commit eed6d25ef3
1 changed files with 6 additions and 3 deletions
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9
dev/interrupt/arm_gic/arm_gic.c
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@@ -31,7 +31,6 @@
#include <lk/init.h>
#include <platform/interrupts.h>
#include <arch/ops.h>
#include <arch/arm.h>
#include <platform/gic.h>
#include <trace.h>
#if WITH_LIB_SM
@@ -160,7 +159,7 @@ void register_int_handler(unsigned int vector, int_handler handler, void *arg)
}
#if WITH_LIB_SM
static DEFINE_GIC_SHADOW_REG(gicd_igroupr, 32, ~0UL, 0);
static DEFINE_GIC_SHADOW_REG(gicd_igroupr, 32, ~0U, 0);
#endif
static DEFINE_GIC_SHADOW_REG(gicd_itargetsr, 4, 0x01010101, 32);
@@ -179,7 +178,7 @@ void arm_gic_init_percpu(void)
{
#if WITH_LIB_SM
GICREG(0, GICC_CTLR) = 0xb; // enable GIC0 and select fiq mode for secure
GICREG(0, GICD_IGROUPR(0)) = ~0UL; /* GICD_IGROUPR0 is banked */
GICREG(0, GICD_IGROUPR(0)) = ~0U; /* GICD_IGROUPR0 is banked */
#else
GICREG(0, GICC_CTLR) = 1; // enable GIC0
#endif
@@ -512,9 +511,13 @@ long smc_intc_request_fiq(smc32_args_t *args)
static uint32_t read_mpidr(void)
{
int mpidr;
#if ARCH_ARM64
mpidr = ARM64_READ_SYSREG(mpidr_el1);
#else
__asm__ volatile("mrc p15, 0, %0, c0, c0, 5"
: "=r" (mpidr)
);
#endif
return mpidr;
}