[target][riscv] Add support for qemu-sifive-u virt machine

A copy/paste from sifive-unleashed but without PWM/LED.

target/qemu-sifive-u/include/platform/sifive.h

@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2019 Elliot Berman
+ *
+ * Use of this source code is governed by a MIT-style
+ * license that can be found in the LICENSE file or at
+ * https://opensource.org/licenses/MIT
+ */
+
+#pragma once
+
+#define SIFIVE_IRQ_UART0 4
+#define SIFIVE_IRQ_UART1 5
+
+#define SIFIVE_NUM_IRQS 127
+
+#define CLINT_BASE 0x02000000
+#define PLIC_BASE  0x0c000000
+#define UART0_BASE 0x10010000
+#define UART1_BASE 0x10011000
+
+#define PLIC_HART_IDX(hart)    (2 * (hart))

target/qemu-sifive-u/rules.mk

@@ -0,0 +1,23 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+MODULE := $(LOCAL_DIR)
+
+PLATFORM := sifive
+VARIANT := sifive_u
+
+GLOBAL_DEFINES += SIFIVE_FREQ=5000000 # 5 MHz
+
+MEMBASE ?= 0x080000000
+MEMSIZE ?= 0x200000000 # 8 GiB
+
+WITH_SMP := 0
+SMP_MAX_CPUS := 4
+
+MODULE_SRCS := $(LOCAL_DIR)/target.c
+# set some global defines based on capability
+GLOBAL_DEFINES += PLATFORM_HAS_DYNAMIC_TIMER=1
+GLOBAL_DEFINES += ARCH_RISCV_CLINT_BASE=0x02000000
+GLOBAL_DEFINES += ARCH_RISCV_MTIME_RATE=10000000   # 10 MHz
+
+include make/module.mk
+

target/qemu-sifive-u/target.c

@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2019 Elliot Berman
+ *
+ * Use of this source code is governed by a MIT-style
+ * license that can be found in the LICENSE file or at
+ * https://opensource.org/licenses/MIT
+ */
+
+#include <target.h>
+#include <arch/arch_ops.h>
+#include <platform/sifive.h>
+
+void target_early_init(void) {
+}
+
+void target_init(void) {
+}
+
+
+