[platform][zynq] tweak to build at lower optimization levels
For some reason this particular sequence isn't picked up as a warning unless you're compiling with -O1 or below.
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@@ -304,7 +304,7 @@ uint32_t zynq_get_clock(enum zynq_periph periph) {
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}
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// get the source clock
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uint32_t srcclk;
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uint32_t srcclk = 0;
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switch (BITS_SHIFT(*REG32(clk_reg), 5, 4)) {
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case 0:
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case 1:
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