[arch][riscv] Add basic support for SiFive HiFive Unleashed
Most of changes were moving around where macros were defined, plus the following: - Remove requirement for floating point on RV64 to support booting monitor core on U54 SoC. - Add support for Debug LEDs on HiFive Unleashed Board
This commit is contained in:
committed by
Travis Geiselbrecht
parent
128890f8a8
commit
d239adf839
@@ -38,7 +38,7 @@ else ifeq ($(SUBARCH),64)
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ifndef TOOLCHAIN_PREFIX
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TOOLCHAIN_PREFIX := riscv64-elf-
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endif
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ARCH_COMPILEFLAGS := -march=rv64imafdc -mabi=lp64d -mcmodel=medany
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ARCH_COMPILEFLAGS := -march=rv64imac -mabi=lp64 -mcmodel=medany
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else
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$(error SUBARCH not set or set to something unknown)
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@@ -26,9 +26,4 @@ endif
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# sifive_e or _u?
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GLOBAL_DEFINES += PLATFORM_${VARIANT}=1
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# set some global defines based on capability
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GLOBAL_DEFINES += PLATFORM_HAS_DYNAMIC_TIMER=1
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GLOBAL_DEFINES += ARCH_RISCV_CLINT_BASE=0x02000000
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GLOBAL_DEFINES += ARCH_RISCV_MTIME_RATE=32768
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include make/module.mk
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2
project/sifive-unleashed-test.mk
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2
project/sifive-unleashed-test.mk
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@@ -0,0 +1,2 @@
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include project/target/sifive-unleashed.mk
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include project/virtual/test.mk
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3
project/target/sifive-unleashed.mk
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3
project/target/sifive-unleashed.mk
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@@ -0,0 +1,3 @@
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TARGET := sifive-unleashed
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SUBARCH := 64
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@@ -13,5 +13,10 @@ GLOBAL_DEFINES += SIFIVE_FREQ=16000000
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MODULE_SRCS := $(LOCAL_DIR)/target.c
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# set some global defines based on capability
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GLOBAL_DEFINES += PLATFORM_HAS_DYNAMIC_TIMER=1
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GLOBAL_DEFINES += ARCH_RISCV_CLINT_BASE=0x02000000
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GLOBAL_DEFINES += ARCH_RISCV_MTIME_RATE=32768
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include make/module.mk
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22
target/sifive-unleashed/include/platform/sifive.h
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22
target/sifive-unleashed/include/platform/sifive.h
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@@ -0,0 +1,22 @@
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/*
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* Copyright (c) 2019 Elliot Berman
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#pragma once
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#define SIFIVE_IRQ_UART0 4
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#define SIFIVE_IRQ_UART1 5
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#define SIFIVE_NUM_IRQS 53
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#define CLINT_BASE 0x02000000
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#define PLIC_BASE 0x0c000000
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#define PRCI_BASE 0x10000000
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#define UART0_BASE 0x10010000
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#define UART1_BASE 0x10011000
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#define PWM0_BASE 0x10020000
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#define PWM1_BASE 0x10021000
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#define GPIO_BASE 0x10060000
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19
target/sifive-unleashed/rules.mk
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19
target/sifive-unleashed/rules.mk
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@@ -0,0 +1,19 @@
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LOCAL_DIR := $(GET_LOCAL_DIR)
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MODULE := $(LOCAL_DIR)
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PLATFORM := sifive
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VARIANT := sifive_u
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GLOBAL_DEFINES += SIFIVE_FREQ=500000000 # 500 MHz
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MEMBASE ?= 0x080000000
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MEMSIZE ?= 0x200000000 # 8 GiB
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MODULE_SRCS := $(LOCAL_DIR)/target.c
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# set some global defines based on capability
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GLOBAL_DEFINES += TARGET_HAS_DEBUG_LED=1
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GLOBAL_DEFINES += PLATFORM_HAS_DYNAMIC_TIMER=1
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GLOBAL_DEFINES += ARCH_RISCV_CLINT_BASE=0x02000000
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GLOBAL_DEFINES += ARCH_RISCV_MTIME_RATE=1000000 # 1 MHz
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include make/module.mk
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38
target/sifive-unleashed/target.c
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38
target/sifive-unleashed/target.c
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@@ -0,0 +1,38 @@
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/*
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* Copyright (c) 2019 Elliot Berman
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#include <target.h>
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#include <arch/arch_ops.h>
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#include <platform/sifive.h>
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static volatile struct {
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volatile uint32_t pwmcfg;
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volatile uint32_t res0;
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volatile uint32_t pwmcount;
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volatile uint32_t res1;
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volatile uint32_t pwms;
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volatile uint32_t res2[3];
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volatile uint32_t pwmcmp[4];
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} *const pwm0_base = (void*)PWM0_BASE;
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void target_early_init(void) {
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pwm0_base->pwmcfg = 0x100f; // enable always and max scaling
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target_set_debug_led(0, false);
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target_set_debug_led(1, false);
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target_set_debug_led(2, false);
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target_set_debug_led(3, false);
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}
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void target_init(void) {
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}
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void target_set_debug_led(unsigned int led, bool on) {
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if(led > 3)
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return;
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pwm0_base->pwmcmp[led] = (0xffff + on) & 0xffff;
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}
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