[spelling] spelling-fixes. (not external/)
This commit is contained in:
committed by
Travis Geiselbrecht
parent
d90cb4e7c6
commit
d0b90c2d68
@@ -131,7 +131,7 @@ snooze_8m:
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movs r1, r2 // save bit 1
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movs r1, r2 // save bit 1
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add r2, r2, r10 // combine with CLK1
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add r2, r2, r10 // combine with CLK1
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DELAY
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DELAY
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str r2, [r7, #OFF_OUT] // commit negative egde
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str r2, [r7, #OFF_OUT] // commit negative edge
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lsrs r3, r3, #1 // advance to next bit
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lsrs r3, r3, #1 // advance to next bit
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add r1, r1, r11 // combine with CLK1
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add r1, r1, r11 // combine with CLK1
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nop
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nop
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@@ -38,7 +38,7 @@
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* read/write API.
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* read/write API.
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*
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*
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* Any subsequent read/write operation may return ERR_CHANNEL_CLOSED. This is
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* Any subsequent read/write operation may return ERR_CHANNEL_CLOSED. This is
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* because we must be able to accomodate the possibility of the device becoming
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* because we must be able to accommodate the possibility of the device becoming
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* disconnected.
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* disconnected.
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* If ERR_CHANNEL_CLOSED is received, the client MUST assume that the connection
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* If ERR_CHANNEL_CLOSED is received, the client MUST assume that the connection
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* has closed and will not be recovered.
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* has closed and will not be recovered.
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@@ -94,7 +94,7 @@ static int semaphore_consumer(void *unused)
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static int semaphore_test(void)
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static int semaphore_test(void)
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{
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{
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static semaphore_t isem = SEMAPHORE_INITIAL_VALUE(isem, 99);
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static semaphore_t isem = SEMAPHORE_INITIAL_VALUE(isem, 99);
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printf("preinitialized sempahore:\n");
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printf("preinitialized semaphore:\n");
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hexdump(&isem, sizeof(isem));
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hexdump(&isem, sizeof(isem));
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sem_init(&sem, sem_start_value);
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sem_init(&sem, sem_start_value);
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@@ -110,7 +110,7 @@ struct arm_cm_exception_frame_fpu {
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extern unsigned int arm_cm_num_irq_pri_bits;
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extern unsigned int arm_cm_num_irq_pri_bits;
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extern unsigned int arm_cm_irq_pri_mask;
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extern unsigned int arm_cm_irq_pri_mask;
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#else
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#else
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/* if we don't want to calculate the nubmer of priority bits, then assume
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/* if we don't want to calculate the number of priority bits, then assume
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* the cpu implements 3 (8 priority levels), which is the minimum according to spec.
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* the cpu implements 3 (8 priority levels), which is the minimum according to spec.
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*/
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*/
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#ifndef __NVIC_PRIO_BITS
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#ifndef __NVIC_PRIO_BITS
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@@ -154,7 +154,7 @@ void arch_init(void)
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//spinlock_test();
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//spinlock_test();
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#if ARM_WITH_MMU
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#if ARM_WITH_MMU
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/* finish intializing the mmu */
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/* finish initializing the mmu */
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arm_mmu_init();
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arm_mmu_init();
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#endif
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#endif
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}
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}
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@@ -258,7 +258,7 @@ static void arm_basic_setup(void)
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arm_fpu_set_enable(false);
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arm_fpu_set_enable(false);
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#endif
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#endif
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/* set the vector base to our exception vectors so we dont need to double map at 0 */
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/* set the vector base to our exception vectors so we don't need to double map at 0 */
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#if ARM_ISA_ARMV7
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#if ARM_ISA_ARMV7
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arm_write_vbar(KERNEL_BASE + KERNEL_LOAD_OFFSET);
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arm_write_vbar(KERNEL_BASE + KERNEL_LOAD_OFFSET);
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#endif
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#endif
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@@ -96,7 +96,7 @@ SECTIONS
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__data_end = .;
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__data_end = .;
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}
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}
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/* unintialized data (in same segment as writable data) */
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/* uninitialized data (in same segment as writable data) */
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.bss : ALIGN(4) {
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.bss : ALIGN(4) {
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KEEP(*(.bss.prebss.*))
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KEEP(*(.bss.prebss.*))
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. = ALIGN(4);
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. = ALIGN(4);
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@@ -103,7 +103,7 @@ SECTIONS
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__data_end = .;
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__data_end = .;
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}
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}
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/* unintialized data (in same segment as writable data) */
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/* uninitialized data (in same segment as writable data) */
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.bss : ALIGN(4) {
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.bss : ALIGN(4) {
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KEEP(*(.bss.prebss.*))
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KEEP(*(.bss.prebss.*))
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. = ALIGN(4);
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. = ALIGN(4);
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@@ -93,7 +93,7 @@ SECTIONS
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__data_end = .;
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__data_end = .;
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}
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}
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/* unintialized data (in same segment as writable data) */
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/* uninitialized data (in same segment as writable data) */
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.bss : ALIGN(8) {
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.bss : ALIGN(8) {
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KEEP(*(.bss.prebss.*))
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KEEP(*(.bss.prebss.*))
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. = ALIGN(8);
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. = ALIGN(8);
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@@ -95,7 +95,7 @@ SECTIONS
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__data_end = .;
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__data_end = .;
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}
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}
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/* unintialized data (in same segment as writable data) */
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/* uninitialized data (in same segment as writable data) */
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.bss : ALIGN(4) {
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.bss : ALIGN(4) {
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__bss_start = .;
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__bss_start = .;
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@@ -112,7 +112,7 @@ SECTIONS
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_sbss_end__ = .;
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_sbss_end__ = .;
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}
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}
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/* unintialized data (in same segment as writable data) */
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/* uninitialized data (in same segment as writable data) */
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.bss : {
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.bss : {
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/* regular bss */
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/* regular bss */
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*(.dynbss)
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*(.dynbss)
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@@ -74,7 +74,7 @@ SECTIONS
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}
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}
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/* unintialized data (in same segment as writable data) */
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/* uninitialized data (in same segment as writable data) */
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.bss : ALIGN(4) {
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.bss : ALIGN(4) {
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KEEP(*(.bss.prebss.*))
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KEEP(*(.bss.prebss.*))
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. = ALIGN(4);
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. = ALIGN(4);
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@@ -89,7 +89,7 @@ real_start:
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movw %ax, %gs
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movw %ax, %gs
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movw %ax, %ss
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movw %ax, %ss
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/* load inital stack pointer */
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/* load initial stack pointer */
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movl $PHYS(_kstack + 4096), %esp
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movl $PHYS(_kstack + 4096), %esp
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/*We jumped here in protected mode in a code segment that migh not longer
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/*We jumped here in protected mode in a code segment that migh not longer
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@@ -94,7 +94,7 @@ real_start:
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movw %ax, %gs
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movw %ax, %gs
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movw %ax, %ss
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movw %ax, %ss
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/* load inital stack pointer */
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/* load initial stack pointer */
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movl $PHYS(_kstack + 4096), %esp
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movl $PHYS(_kstack + 4096), %esp
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/* We need to jump to our sane 32 bit CS */
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/* We need to jump to our sane 32 bit CS */
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@@ -101,7 +101,7 @@ static int usb_append_interface(usb_descriptor *desc, const uint8_t *int_descr,
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// patch our interface descriptor with the new id
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// patch our interface descriptor with the new id
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ptr[2] = interface_num;
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ptr[2] = interface_num;
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// append it to our config desriptor
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// append it to our config descriptor
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append_desc_data(desc, ptr, len);
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append_desc_data(desc, ptr, len);
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free(ptr);
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free(ptr);
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@@ -89,7 +89,7 @@ struct driver {
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}
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}
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/*
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/*
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* returns the driver specific ops pointer given the device instance, specifc
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* returns the driver specific ops pointer given the device instance, specific
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* ops type, and generic ops member name within the specific ops structure.
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* ops type, and generic ops member name within the specific ops structure.
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*/
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*/
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#define device_get_driver_ops(dev, type, member) ({ \
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#define device_get_driver_ops(dev, type, member) ({ \
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@@ -29,7 +29,7 @@
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**
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**
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** CRC and minimum length padding are handled by the driver.
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** CRC and minimum length padding are handled by the driver.
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**
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**
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** Data is malloc()'d and ownership is transfered to the ethernet
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** Data is malloc()'d and ownership is transferred to the ethernet
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** device which will free() it once the packet is transmitted.
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** device which will free() it once the packet is transmitted.
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**
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**
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*/
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*/
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@@ -492,7 +492,7 @@ void bio_initialize_bdev(bdev_t *dev,
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#if DEBUG
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#if DEBUG
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// If we have been supplied information about our erase geometry, sanity
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// If we have been supplied information about our erase geometry, sanity
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// check it in debug bulids.
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// check it in debug builds.
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if (geometry_count && geometry) {
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if (geometry_count && geometry) {
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for (size_t i = 0; i < geometry_count; ++i) {
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for (size_t i = 0; i < geometry_count; ++i) {
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bio_erase_geometry_info_t *info = geometry + i;
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bio_erase_geometry_info_t *info = geometry + i;
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@@ -173,10 +173,10 @@ nextcomponent:
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}
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}
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if (!done) {
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if (!done) {
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/* move to the next seperator */
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/* move to the next separator */
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ptr = next_sep + 1;
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ptr = next_sep + 1;
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/* consume multiple seperators */
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/* consume multiple separators */
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while (*ptr == '/')
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while (*ptr == '/')
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ptr++;
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ptr++;
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}
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}
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@@ -207,10 +207,10 @@ status_t fat32_open_file(fscookie *cookie, const char *path, filecookie **fcooki
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if (done == true) {
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if (done == true) {
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break;
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break;
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} else {
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} else {
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/* move to the next seperator */
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/* move to the next separator */
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ptr = next_sep + 1;
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ptr = next_sep + 1;
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/* consume multiple seperators */
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/* consume multiple separators */
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while (*ptr == '/') {
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while (*ptr == '/') {
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ptr++;
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ptr++;
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}
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}
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@@ -519,7 +519,7 @@ void fs_normalize_path(char *path)
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outpos = 0;
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outpos = 0;
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done = false;
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done = false;
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/* remove duplicate path seperators, flatten empty fields (only composed of .), backtrack fields with .., remove trailing slashes */
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/* remove duplicate path separators, flatten empty fields (only composed of .), backtrack fields with .., remove trailing slashes */
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while (!done) {
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while (!done) {
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c = path[pos];
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c = path[pos];
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switch (state) {
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switch (state) {
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@@ -623,7 +623,7 @@ void fs_normalize_path(char *path)
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}
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}
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}
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}
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/* dont end with trailing slashes */
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/* don't end with trailing slashes */
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if (outpos > 0 && path[outpos - 1] == '/')
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if (outpos > 0 && path[outpos - 1] == '/')
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outpos--;
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outpos--;
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@@ -86,7 +86,7 @@ status_t fs_stat_fs(const char *mountpoint, struct fs_stat *stat) __NONNULL((1))
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/* convenience routines */
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/* convenience routines */
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ssize_t fs_load_file(const char *path, void *ptr, size_t maxlen) __NONNULL();
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ssize_t fs_load_file(const char *path, void *ptr, size_t maxlen) __NONNULL();
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/* walk through a path string, removing duplicate path seperators, flattening . and .. references */
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/* walk through a path string, removing duplicate path separators, flattening . and .. references */
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void fs_normalize_path(char *path) __NONNULL();
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void fs_normalize_path(char *path) __NONNULL();
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/* Remove any leading spaces or slashes */
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/* Remove any leading spaces or slashes */
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@@ -342,7 +342,7 @@ static void *TestTrimHelper(ssize_t target)
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*(char **)next_block = answer;
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*(char **)next_block = answer;
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answer = next_block;
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answer = next_block;
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if (theheap.remaining > remaining) return answer;
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if (theheap.remaining > remaining) return answer;
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// Abandon attemt to hit particular freelist entry size if we accidentally got more memory
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// Abandon attempt to hit particular freelist entry size if we accidentally got more memory
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// from the OS.
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// from the OS.
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remaining = theheap.remaining;
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remaining = theheap.remaining;
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}
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}
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@@ -88,7 +88,7 @@ static void free_pktbuf_buf_cb(void *buf, void *arg)
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*
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*
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* It's important to note that there is a flag to note that the buffer is cached and should
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* It's important to note that there is a flag to note that the buffer is cached and should
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* be properly handled via the appropriate driver when it's time to deal with buffer
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* be properly handled via the appropriate driver when it's time to deal with buffer
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* descriptiors.
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* descriptors.
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*/
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*/
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void pktbuf_add_buffer(pktbuf_t *p, u8 *buf, u32 len, uint32_t header_sz, uint32_t flags,
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void pktbuf_add_buffer(pktbuf_t *p, u8 *buf, u32 len, uint32_t header_sz, uint32_t flags,
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pktbuf_free_callback cb, void *cb_args)
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pktbuf_free_callback cb, void *cb_args)
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@@ -366,7 +366,7 @@ static bool test_deletion(void)
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return false;
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return false;
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EXPECT_EQ(2, (inode)->reference_count,
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EXPECT_EQ(2, (inode)->reference_count,
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"Reference count should count one non-deleted version of object");
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"Reference count should count one non-deleted version of object");
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EXPECT_EQ(24, (inode)->location, "Not pointing to current verison");
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EXPECT_EQ(24, (inode)->location, "Not pointing to current version");
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write_pointer = FLASH_PAGE_SIZE + sizeof(erase_header);
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write_pointer = FLASH_PAGE_SIZE + sizeof(erase_header);
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write_pointer += flash_nor_write(0, write_pointer, sizeof(erase_header),
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write_pointer += flash_nor_write(0, write_pointer, sizeof(erase_header),
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erase_header);
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erase_header);
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@@ -351,7 +351,7 @@ static off_t ptable_adjust_request_for_erase_geometry(uint64_t region_start,
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// Intersect each of the erase regions with the region being proposed and
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// Intersect each of the erase regions with the region being proposed and
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// see if we can fit the allocation request in the intersection, after
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// see if we can fit the allocation request in the intersection, after
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// adjusting the intersection and requested length to multiples of and
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// adjusting the intersection and requested length to multiples of and
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// alligned to the erase block size. Test the geometries back-to-front
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// aligned to the erase block size. Test the geometries back-to-front
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// instead of front-to-back if alloc_end has been reqeusted.
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// instead of front-to-back if alloc_end has been reqeusted.
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for (size_t i = 0; i < ptable.bdev->geometry_count; ++i) {
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for (size_t i = 0; i < ptable.bdev->geometry_count; ++i) {
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size_t geo_index = alloc_end ? (ptable.bdev->geometry_count - i - 1) : i;
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size_t geo_index = alloc_end ? (ptable.bdev->geometry_count - i - 1) : i;
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@@ -195,7 +195,7 @@ static void udp_svc_callback(void *data, size_t len,
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opcode = ntohs(RD_U16(data));
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opcode = ntohs(RD_U16(data));
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if (opcode != TFTP_OPCODE_WRQ) {
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if (opcode != TFTP_OPCODE_WRQ) {
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// Operation not suported.
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// Operation not supported.
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LTRACEF("op not supported, opcode: %d\n", opcode);
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LTRACEF("op not supported, opcode: %d\n", opcode);
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send_error(socket, TFTP_ERROR_ACCESS);
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send_error(socket, TFTP_ERROR_ACCESS);
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udp_close(socket);
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udp_close(socket);
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@@ -24,7 +24,7 @@
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#include <reg.h>
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#include <reg.h>
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/* common addres space regions */
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/* common address space regions */
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#define FPGASLAVES_BASE (0xc0000000)
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#define FPGASLAVES_BASE (0xc0000000)
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#define PERIPH_BASE (0xfc000000)
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#define PERIPH_BASE (0xfc000000)
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#define LWPFGASLAVES_BASE (0xff200000)
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#define LWPFGASLAVES_BASE (0xff200000)
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@@ -73,7 +73,7 @@ typedef enum {
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/* IER */
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/* IER */
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#define UART_IER_ERBFI (1 << 0) /* RX buffer conatins data int. */
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#define UART_IER_ERBFI (1 << 0) /* RX buffer contains data int. */
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#define UART_IER_ETBEI (1 << 1) /* TX FIFO threshold trigger int. */
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#define UART_IER_ETBEI (1 << 1) /* TX FIFO threshold trigger int. */
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#define UART_IER_ELSI (1 << 2) /* BE, FE, PE, or OE int. */
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#define UART_IER_ELSI (1 << 2) /* BE, FE, PE, or OE int. */
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#define UART_IER_EDSSI (1 << 3) /* CTS change (DCTS) int. */
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#define UART_IER_EDSSI (1 << 3) /* CTS change (DCTS) int. */
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@@ -51,7 +51,7 @@ static uint16_t divisor;
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#define INTERNAL_FREQ_3X 3579546ULL
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#define INTERNAL_FREQ_3X 3579546ULL
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/* Maximum amount of time that can be program on the timer to schedule the next
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/* Maximum amount of time that can be program on the timer to schedule the next
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* interrupt, in miliseconds */
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* interrupt, in milliseconds */
|
||||||
#define MAX_TIMER_INTERVAL 55
|
#define MAX_TIMER_INTERVAL 55
|
||||||
|
|
||||||
|
|
||||||
@@ -190,7 +190,7 @@ status_t platform_set_oneshot_timer(platform_timer_callback callback,
|
|||||||
|
|
||||||
divisor = count & 0xffff;
|
divisor = count & 0xffff;
|
||||||
timer_delta_time = (3685982306ULL * count) >> 10;
|
timer_delta_time = (3685982306ULL * count) >> 10;
|
||||||
/* Program PIT in teh software strobe configuration, to send one pulse
|
/* Program PIT in the software strobe configuration, to send one pulse
|
||||||
* after the count reach 0 */
|
* after the count reach 0 */
|
||||||
outp(I8253_CONTROL_REG, 0x38);
|
outp(I8253_CONTROL_REG, 0x38);
|
||||||
outp(I8253_DATA_REG, divisor & 0xff); // LSB
|
outp(I8253_DATA_REG, divisor & 0xff); // LSB
|
||||||
|
|||||||
@@ -329,7 +329,7 @@ const void *const __SECTION(".text.boot.vectab2") vectab2[] = {
|
|||||||
VECTAB_ENTRY(DMA2_Channel3_IRQ), /*!< DMA2 Channel 3 global Interrupt */
|
VECTAB_ENTRY(DMA2_Channel3_IRQ), /*!< DMA2 Channel 3 global Interrupt */
|
||||||
VECTAB_ENTRY(DMA2_Channel4_5_IRQ), /*!< DMA2 Channel 4 and Channel 5 global Interrupt */
|
VECTAB_ENTRY(DMA2_Channel4_5_IRQ), /*!< DMA2 Channel 4 and Channel 5 global Interrupt */
|
||||||
VECTAB_ENTRY(DMA2_Channel5_IRQ), /*!< DMA2 Channel 5 global Interrupt (DMA2 Channel 5 is
|
VECTAB_ENTRY(DMA2_Channel5_IRQ), /*!< DMA2 Channel 5 global Interrupt (DMA2 Channel 5 is
|
||||||
mapped at postion 60 only if the MISC_REMAP bit in
|
mapped at position 60 only if the MISC_REMAP bit in
|
||||||
the AFIO_MAPR2 register is set) */
|
the AFIO_MAPR2 register is set) */
|
||||||
#endif /* STM32F10X_HD_VL */
|
#endif /* STM32F10X_HD_VL */
|
||||||
|
|
||||||
|
|||||||
@@ -350,7 +350,7 @@ static ssize_t spiflash_bdev_read(struct bdev *bdev, void *buf, off_t offset, si
|
|||||||
if (len == 0)
|
if (len == 0)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
// XXX handle not mulitple of 4
|
// XXX handle not multiple of 4
|
||||||
qspi_rd32(&flash.qspi, offset, buf, len / 4);
|
qspi_rd32(&flash.qspi, offset, buf, len / 4);
|
||||||
|
|
||||||
return len;
|
return len;
|
||||||
|
|||||||
@@ -162,7 +162,7 @@ status_t display_present(struct display_image *image, uint starty, uint endy)
|
|||||||
uint8_t *bufptr = localbuf;
|
uint8_t *bufptr = localbuf;
|
||||||
uint8_t trailer = 0;
|
uint8_t trailer = 0;
|
||||||
|
|
||||||
// The first line is preceeded with a write command.
|
// The first line is preceded with a write command.
|
||||||
*bufptr++ = MLCD_WR | vcom_state;
|
*bufptr++ = MLCD_WR | vcom_state;
|
||||||
|
|
||||||
vcom_state = vcom_state == VCOM_HI ? VCOM_LO : VCOM_HI;
|
vcom_state = vcom_state == VCOM_HI ? VCOM_LO : VCOM_HI;
|
||||||
|
|||||||
@@ -49,7 +49,7 @@ STATIC const PINMUX_GRP_T ioconSetup[] = {
|
|||||||
{0, 3, (IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, /* PIO0_3-SCT1_OUT4-GRN */
|
{0, 3, (IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, /* PIO0_3-SCT1_OUT4-GRN */
|
||||||
{1, 1, (IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, /* PIO1_1-BREAK_STS1-BLUE */
|
{1, 1, (IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, /* PIO1_1-BREAK_STS1-BLUE */
|
||||||
|
|
||||||
/* QEI, motor controler, I2C, CAN */
|
/* QEI, motor controller, I2C, CAN */
|
||||||
{0, 2, (IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, /* PIO0_2-QEI-SCT0_IN */
|
{0, 2, (IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, /* PIO0_2-QEI-SCT0_IN */
|
||||||
{0, 30, (IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, /* PIO0_30-QEI-SCT0_IN */
|
{0, 30, (IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, /* PIO0_30-QEI-SCT0_IN */
|
||||||
{0, 17, (IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, /* PIO0_17-QEI-SCT0_IN */
|
{0, 17, (IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, /* PIO0_17-QEI-SCT0_IN */
|
||||||
@@ -138,7 +138,7 @@ void Board_SetupMuxing(void)
|
|||||||
/* Initialize debug output via UART for board */
|
/* Initialize debug output via UART for board */
|
||||||
void Board_Debug_Init(void)
|
void Board_Debug_Init(void)
|
||||||
{
|
{
|
||||||
/* Disables pullups/pulldowns and enable digitial mode */
|
/* Disables pullups/pulldowns and enable digital mode */
|
||||||
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 13, (IOCON_MODE_INACT | IOCON_DIGMODE_EN));
|
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 13, (IOCON_MODE_INACT | IOCON_DIGMODE_EN));
|
||||||
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 18, (IOCON_MODE_INACT | IOCON_DIGMODE_EN));
|
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 18, (IOCON_MODE_INACT | IOCON_DIGMODE_EN));
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user