[arch][avr32] start of support for avr32 exceptions

2010-06-16 01:43:24 -07:00
parent 223c9e7cb7
commit c9e55d4b70
7 changed files with 185 additions and 28 deletions
--- a/arch/avr32/arch.c
+++ b/arch/avr32/arch.c
@@ -24,8 +24,18 @@
 #include <arch.h>
 #include <arch/avr32.h>

+extern uint32_t avr32_exception_base;
+
 void arch_early_init(void)
 {
+	TRACE_ENTRY;
+	printf("sr 0x%x\n", avr32_get_sr());
+	printf("mmucr 0x%x\n", avr32_get_mmucr());
+
+	/* set the exception base */
+	avr32_set_evba((uint32_t)&avr32_exception_base);
+
+	TRACE_EXIT;
 }

 void arch_init(void)
--- a/arch/avr32/exceptions.S
+++ b/arch/avr32/exceptions.S
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2010 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <asm.h>
+
+.text
+.align 9
+DATA(avr32_exception_base)
+	rjmp	unhandled_exception 	/* unrecoverable exception */
+	rjmp	unhandled_exception		/* tlb multiple hit */
+	rjmp	unhandled_exception		/* bus error data fetch */
+	rjmp	unhandled_exception		/* bus error instruction fetch */
+	rjmp	unhandled_exception		/* nmi */
+	rjmp	unhandled_exception		/* instrction address? */
+	rjmp	unhandled_exception		/* itlb protection */
+	rjmp	unhandled_exception		/* breakpoint */
+	rjmp	unhandled_exception		/* illegal opcode */
+	rjmp	unhandled_exception		/* unimplemented opcode */
+	rjmp	unhandled_exception		/* priviledge violation */
+	rjmp	unhandled_exception		/* floating-point */
+	rjmp	unhandled_exception		/* coprocessor absent */
+	rjmp	unhandled_exception		/* data address(read) */
+	rjmp	unhandled_exception		/* data address(write) */
+	rjmp	unhandled_exception		/* dtlb protection (read) */
+	rjmp	unhandled_exception		/* dtlb protection (write) */
+	rjmp	unhandled_exception		/* dtlb modified */
+
+	// 0x50
+	.skip	(0x50 - (. - avr32_exception_base))
+	rjmp	unhandled_exception		/* itlb miss */
+
+	// 0x60
+	.skip	(0x60 - (. - avr32_exception_base))
+	rjmp	unhandled_exception		/* dtlb miss(read) */
+
+	// 0x70
+	.skip	(0x70 - (. - avr32_exception_base))
+	rjmp	unhandled_exception		/* dtlb miss(write) */
+
+	// 0x100
+	.skip	(0x100 - (. - avr32_exception_base))
+	rcall	avr32_syscall
+	rets
+
+.align 2
+FUNCTION(unhandled_exception)
+	rjmp	avr32_unhandled
+
--- a/arch/avr32/exceptions_c.c
+++ b/arch/avr32/exceptions_c.c
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2010 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <debug.h>
+#include <arch.h>
+#include <arch/avr32.h>
+
+void avr32_syscall(void)
+{
+	printf("syscall entry\n");
+	printf("sr 0x%x\n", avr32_get_sr());
+	printf("rar_sup 0x%x\n", avr32_get_rar_sup());
+	printf("rsr_sup 0x%x\n", avr32_get_rsr_sup());
+	panic("unhandled syscall\n");
+}
+
+void avr32_unhandled(void)
+{
+	printf("unhandled exception %d\n", avr32_get_ecr());
+	panic("unhandled\n");
+}
--- a/arch/avr32/include/arch/avr32.h
+++ b/arch/avr32/include/arch/avr32.h
@@ -95,6 +95,61 @@ static inline void avr32_dcache_clean_invalidate_line(void *addr)
 	__asm__ volatile("cache %0[0], 0xd" :: "r"(addr) : "memory");
 }

+/* system registers */
+#define SR_GETPUT(name, regnum) \
+	static inline uint32_t avr32_get_##name(void) \
+	{ \
+		uint32_t ret; \
+		__asm__ volatile("mfsr	%0," #regnum : "=r"(ret)); \
+		return ret; \
+	} \
+\
+	static inline void avr32_set_##name(uint32_t val) \
+	{ \
+		__asm__ volatile("mtsr	" #regnum ", %0" :: "r"(val)); \
+	}
+
+SR_GETPUT(sr, 0)
+SR_GETPUT(evba, 4)
+SR_GETPUT(acba, 8)
+SR_GETPUT(cpucr, 12)
+SR_GETPUT(ecr, 16)
+SR_GETPUT(rsr_sup, 20)
+SR_GETPUT(rsr_int0, 24)
+SR_GETPUT(rsr_int1, 28)
+SR_GETPUT(rsr_int2, 32)
+SR_GETPUT(rsr_int3, 36)
+SR_GETPUT(rsr_ex, 40)
+SR_GETPUT(rsr_nmi, 44)
+SR_GETPUT(rsr_dbg, 48)
+SR_GETPUT(rar_sup, 52)
+SR_GETPUT(rar_int0, 56)
+SR_GETPUT(rar_int1, 60)
+SR_GETPUT(rar_int2, 64)
+SR_GETPUT(rar_int3, 68)
+SR_GETPUT(rar_ex, 72)
+SR_GETPUT(rar_nmi, 76)
+SR_GETPUT(rar_dbg, 80)
+SR_GETPUT(config0, 256)
+SR_GETPUT(config1, 260)
+SR_GETPUT(count, 264)
+SR_GETPUT(compare, 268)
+SR_GETPUT(tlbehi, 272)
+SR_GETPUT(tlbelo, 276)
+SR_GETPUT(ptbr, 280)
+SR_GETPUT(tlbear, 284)
+SR_GETPUT(mmucr, 288)
+SR_GETPUT(tlbarlo, 292)
+SR_GETPUT(tlbarhi, 296)
+SR_GETPUT(pccnt, 300)
+SR_GETPUT(pcnt0, 304)
+SR_GETPUT(pcnt1, 308)
+SR_GETPUT(pccr, 312)
+SR_GETPUT(bear, 316)
+SR_GETPUT(sabal, 768)
+SR_GETPUT(sabah, 772)
+SR_GETPUT(sabd, 776)
+
 #if defined(__cplusplus)
 }
 #endif
--- a/arch/avr32/ops.S
+++ b/arch/avr32/ops.S
@@ -26,22 +26,18 @@

 /* void arch_enable_ints(void); */
 FUNCTION(arch_enable_ints)
-#if 0
-	mrs	r0, cpsr
-	bic	r0, r0, #(1<<7)		/* clear the I bit */
-	msr	cpsr_c, r0
-	bx	lr
-#endif
+	mfsr	r8, 0 /* sr */
+	cbr		r8, 16
+	mtsr	0, r8 /* sr */
+
 	retal	r12

 /* void arch_disable_ints(void); */
 FUNCTION(arch_disable_ints)
-#if 0
-	mrs	r0, cpsr
-	orr	r0, r0, #(1<<7)
-	msr	cpsr_c, r0
-	bx	lr
-#endif
+	mfsr	r8, 0 /* sr */
+	sbr		r8, 16
+	mtsr	0, r8 /* sr */
+
 	retal	r12

 /* int atomic_swap(int *ptr, int val); */
@@ -166,21 +162,7 @@ FUNCTION(atomic_or)

 /* void arch_idle(); */
 FUNCTION(arch_idle)
-#if 0
-#if ARM_CPU_CORTEX_A8
-	wfi
-#elif PLATFORM_MSM7K
-	/* TODO: safely handle wfi */
-#elif ARM_CPU_ARM1136 || ARM_CPU_ARM926
-	mov	r0, #0
-	mcr	p15, 0, r0, c7, c0, #4
-#elif ARM_CPU_ARM7
-	/* nothing to do here */
-#else
-#error unknown cpu
-#endif
-	bx	lr
-#endif
+	sleep	0
 	retal	r12

 /* void arch_switch_stacks_and_call(addr_t call, addr_t stack) */
--- a/arch/avr32/rules.mk
+++ b/arch/avr32/rules.mk
@@ -15,9 +15,10 @@ OBJS += \
 	$(LOCAL_DIR)/arch.o \
 	$(LOCAL_DIR)/cache.o \
 	$(LOCAL_DIR)/asm.o \
+	$(LOCAL_DIR)/exceptions.o \
+	$(LOCAL_DIR)/exceptions_c.o \

 #	$(LOCAL_DIR)/cache-ops.o \
-	$(LOCAL_DIR)/exceptions.o \
 	$(LOCAL_DIR)/faults.o \
 	$(LOCAL_DIR)/mmu.o \
 	$(LOCAL_DIR)/dcc.o
--- a/include/asm.h
+++ b/include/asm.h
@@ -26,5 +26,7 @@
 //#define FUNCTION(x) .global x; .type x,@function; x:
 #define FUNCTION(x) .global x; x:

+#define DATA(x) .global x; x:
+
 #endif