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WIP [target][visionfive2] Add initial support for a VisionFive 2 RISC-V board

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Still TODO:
-Set the timer rate properly
-Fix nonzero based hart secondary cpu boot
-Try to parse the device tree for some information
This commit is contained in:
Travis Geiselbrecht
2023-03-06 01:06:27 -08:00
parent ca633e2cb2
commit c66ad44efa
11 changed files with 572 additions and 1 deletions
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7
target/visionfive2/rules.mk Normal file
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@@ -0,0 +1,7 @@
LOCAL_DIR := $(GET_LOCAL_DIR)
MODULE := $(LOCAL_DIR)
PLATFORM := jh7110
MEMSIZE ?= 0x200000000 # 8GB