[arch][riscv] add fpu context switch support
Currently only implemented for double precision floating point. Caveat: currently unable to only compile some code with or without float. The linker is extremely picky about mixing float and no-float objects, so stick with all on or off for now. It's not as much of a problem currently because the toolchain is not using any riscv vector instructions to assist normal code, so it's generally only emitting fpu instructions for floating point code.
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@@ -5,7 +5,7 @@
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#if ARM_WITH_VFP || ARCH_ARM64 || X86_WITH_FPU
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#if ARM_WITH_VFP || ARCH_ARM64 || X86_WITH_FPU || (ARCH_RISCV && RISCV_FPU)
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#include <stdio.h>
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#include <rand.h>
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