[arch][riscv] add fpu context switch support

Currently only implemented for double precision floating point.

Caveat: currently unable to only compile some code with or without
float. The linker is extremely picky about mixing float and no-float
objects, so stick with all on or off for now.

It's not as much of a problem currently because the toolchain is not
using any riscv vector instructions to assist normal code, so it's
generally only emitting fpu instructions for floating point code.
This commit is contained in:
Travis Geiselbrecht
2022-07-17 23:27:42 -07:00
parent 6462cbf51c
commit b0d8aeed18
7 changed files with 214 additions and 29 deletions

View File

@@ -5,7 +5,7 @@
* license that can be found in the LICENSE file or at
* https://opensource.org/licenses/MIT
*/
#if ARM_WITH_VFP || ARCH_ARM64 || X86_WITH_FPU
#if ARM_WITH_VFP || ARCH_ARM64 || X86_WITH_FPU || (ARCH_RISCV && RISCV_FPU)
#include <stdio.h>
#include <rand.h>