Add FVP Base platform

platform/fvp-base/debug.c

@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2025 Mykola Hohsadze
+ *
+ * Use of this source code is governed by a MIT-style
+ * license that can be found in the LICENSE file or at
+ * https://opensource.org/licenses/MIT
+ */
+#include <stdarg.h>
+#include <lk/reg.h>
+#include <kernel/thread.h>
+#include <dev/uart.h>
+#include <platform/debug.h>
+#include <platform/fvp-base.h>
+#include <target/debugconfig.h>
+
+/* DEBUG_UART must be defined to 0 */
+#if !defined(DEBUG_UART) || DEBUG_UART != 0
+#error define DEBUG_UART to 0
+#endif
+
+void platform_dputc(char c) {
+    if (c == '\n')
+        uart_putc(DEBUG_UART, '\r');
+    uart_putc(DEBUG_UART, c);
+}
+
+int platform_dgetc(char *c, bool wait) {
+    int ret = uart_getc(DEBUG_UART, wait);
+    if (ret < 0) {
+        return ret;
+    }
+    *c = ret;
+    return 0;
+}

platform/fvp-base/include/platform/fvp-base.h

@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2025 Mykola Hohsadze
+ *
+ * Use of this source code is governed by a MIT-style
+ * license that can be found in the LICENSE file or at
+ * https://opensource.org/licenses/MIT
+ */
+#pragma once
+
+/* up to 2 GB of ram */
+#define MEMORY_BASE_PHYS     (0x80000000UL)
+#define MEMORY_APERTURE_SIZE (2ULL * 1024 * 1024 * 1024)
+
+#define DTB_BASE_VIRT (KERNEL_BASE + 0x2000000)
+
+/* map all of 0-2GB into kernel space in one shot */
+#define PERIPHERAL_BASE_PHYS (0)
+#define PERIPHERAL_BASE_SIZE (0x80000000UL) // 2GB
+#define PERIPHERAL_BASE_VIRT (0xffffffff80000000ULL) // -2GB
+
+/* individual peripherals in this mapping */
+#define UART_BASE (PERIPHERAL_BASE_VIRT + 0x001c090000)
+
+/* interrupts */
+#define ARM_GENERIC_TIMER_VIRTUAL_INT (27)
+#define PL011_UART0_INT (32 + 5)
+
+#define MAX_INT 128

platform/fvp-base/include/platform/gic.h

@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Mykola Hohsadze
+ *
+ * Use of this source code is governed by a MIT-style
+ * license that can be found in the LICENSE file or at
+ * https://opensource.org/licenses/MIT
+ */
+#pragma once
+
+#include <platform/fvp-base.h>
+
+#define GICBASE(n)  (PERIPHERAL_BASE_VIRT + 0x2c000000UL)
+#define GICD_OFFSET (0x03000000)
+#define GICC_OFFSET (0x0)

platform/fvp-base/platform.c

@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2025 Mykola Hohsadze
+ *
+ * Use of this source code is governed by a MIT-style
+ * license that can be found in the LICENSE file or at
+ * https://opensource.org/licenses/MIT
+ */
+#include <platform/fvp-base.h>
+
+#include <arch.h>
+#include <lk/err.h>
+#include <lk/debug.h>
+#include <lk/trace.h>
+#include <platform.h>
+#include <platform/gic.h>
+#include <platform/interrupts.h>
+#include <dev/interrupt/arm_gic.h>
+#include <dev/timer/arm_generic.h>
+#include <dev/power/psci.h>
+#include <dev/uart/pl011.h>
+#include <lk/init.h>
+#include <lib/fdtwalk.h>
+#include <kernel/vm.h>
+#include <kernel/spinlock.h>
+
+#define LOCAL_TRACE 0
+
+struct mmu_initial_mapping mmu_initial_mappings[] = {
+    {
+        .phys = MEMBASE,
+        .virt = KERNEL_BASE,
+        .size = MEMORY_APERTURE_SIZE,
+        .flags = 0,  // normal memory
+        .name = "memory",
+    },
+    {
+        .phys = PERIPHERAL_BASE_PHYS,
+        .virt = PERIPHERAL_BASE_VIRT,
+        .size = PERIPHERAL_BASE_SIZE,
+        .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
+        .name = "peripherals",
+    },
+    { 0 }
+};
+
+const void *fdt = (void *)DTB_BASE_VIRT;
+
+const void *get_fdt(void) {
+    return fdt;
+}
+
+void platform_early_init(void) {
+    const struct pl011_config uart_config = {
+        .base = UART_BASE,
+        .irq = PL011_UART0_INT,
+        .flag = PL011_FLAG_DEBUG_UART,
+    };
+
+    pl011_init_early(0, &uart_config);
+
+    arm_gic_init();
+
+    arm_generic_timer_init(ARM_GENERIC_TIMER_VIRTUAL_INT, 0);
+
+    if (LOCAL_TRACE) {
+        LTRACEF("dumping FDT at %p\n", fdt);
+        fdt_walk_dump(fdt);
+    }
+
+    // detect physical memory layout from the device tree
+    fdtwalk_setup_memory(fdt, MEMORY_BASE_PHYS, MEMORY_BASE_PHYS, MEMSIZE);
+}
+
+void platform_init(void) {
+    pl011_init(0);
+}
+
+void platform_halt(platform_halt_action suggested_action, platform_halt_reason reason) {
+    // Use the default halt implementation using psci as the reset and shutdown implementation.
+    platform_halt_default(suggested_action, reason, &psci_system_reset, &psci_system_off);
+}

platform/fvp-base/rules.mk

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+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+MODULE := $(LOCAL_DIR)
+
+LK_HEAP_IMPLEMENTATION ?= dlmalloc
+
+ARCH	:= arm64
+ARM_CPU := cortex-a53
+CPU	:= generic
+WITH_SMP := 1
+
+MODULE_SRCS += $(LOCAL_DIR)/debug.c
+MODULE_SRCS += $(LOCAL_DIR)/platform.c
+
+MEMBASE := 0x80000000
+MEMSIZE ?= 0x80000000
+KERNEL_LOAD_OFFSET := 0x8000000
+
+MODULE_DEPS += \
+    dev/power/psci \
+    dev/interrupt/arm_gic \
+    dev/timer/arm_generic \
+    dev/uart/pl011 \
+    lib/fdtwalk \
+
+GLOBAL_DEFINES += \
+    MEMBASE=$(MEMBASE) \
+    MEMSIZE=$(MEMSIZE) \
+    MMU_WITH_TRAMPOLINE=1 \
+    TIMER_ARM_GENERIC_SELECTED=CNTV
+
+LINKER_SCRIPT += \
+    $(BUILDDIR)/system-onesegment.ld
+
+include make/module.mk