[arch][microblaze] fix the microblaze port

Apparently stumbled into some sort of linker bug with gc-sections enabled.
Disable for now, and clean up the linker script a little bit.

arch/microblaze/arch.c

@@ -25,9 +25,11 @@
 #include <stdint.h>
 #include <arch/microblaze.h>
 
+#define LOCAL_TRACE 0
+
 void arch_early_init(void)
 {
-    TRACE;
+    LTRACE;
 
     /* enable i/d cache */
     uint32_t val = mb_read_msr();
@@ -37,7 +39,7 @@ void arch_early_init(void)
 
 void arch_init(void)
 {
-    TRACE;
+    LTRACE;
 }
 
 void arch_idle(void)

arch/microblaze/linker.ld

@@ -54,9 +54,16 @@ SECTIONS
         _SDATA2_START__ = .;
         *(.sdata2)
         _SDATA2_END__ = .;
-        __rodata_end = .;
     }
 
+    /*
+     * extra linker scripts tend to insert sections just after .rodata,
+     * so we want to make sure this symbol comes after anything inserted above,
+     * but not aligned to the next section necessarily.
+     */
+    .dummy_post_rodata : {
+        __rodata_end = .;
+    }
 
     .data : ALIGN(4) {
         /* writable data  */
@@ -77,10 +84,16 @@ SECTIONS
         _SDATA_START__ = .;
         *(.sdata)
         _SDATA_END__ = .;
-
-        __data_end = .;
     }
 
+    /*
+     * extra linker scripts tend to insert sections just after .data,
+     * so we want to make sure this symbol comes after anything inserted above,
+     * but not aligned to the next section necessarily.
+     */
+    .dummy_post_data : {
+        __data_end = .;
+    }
 
     /* unintialized data (in same segment as writable data) */
     .bss : ALIGN(4) {

arch/microblaze/rules.mk

@@ -24,7 +24,7 @@ ifndef TOOLCHAIN_PREFIX
 TOOLCHAIN_PREFIX := microblaze-elf-
 endif
 
-WITH_LINKER_GC ?= 1
+WITH_LINKER_GC ?= 0
 
 LITTLE_ENDIAN ?= 0
 
@@ -40,6 +40,7 @@ $(info LIBGCC = $(LIBGCC))
 cc-option = $(shell if test -z "`$(1) $(2) -S -o /dev/null -xc /dev/null 2>&1`"; \
 	then echo "$(2)"; else echo "$(3)"; fi ;)
 
+ARCH_COMPILEFLAGS :=
 ARCH_OPTFLAGS := -O2
 
 GLOBAL_LDFLAGS += -relax

arch/microblaze/thread.c

@@ -60,9 +60,6 @@ void arch_thread_initialize(thread_t *t)
     /* some registers we want to clone for the new thread */
     register uint32_t r2 asm("r2");
     register uint32_t r13 asm("r13");
-    register uint32_t r14 asm("r14");
-    register uint32_t r16 asm("r16");
-    register uint32_t r17 asm("r17");
 
     /* zero out the thread context */
     memset(&t->arch.cs_frame, 0, sizeof(t->arch.cs_frame));
@@ -70,10 +67,10 @@ void arch_thread_initialize(thread_t *t)
     t->arch.cs_frame.r1 = (vaddr_t)t->stack + t->stack_size;
     t->arch.cs_frame.r2 = r2;
     t->arch.cs_frame.r13 = r13;
-    t->arch.cs_frame.r14 = r14;
-    t->arch.cs_frame.r15 = (vaddr_t)initial_thread_func - 8; // rtsd in context switch expects this
-    t->arch.cs_frame.r16 = r16;
-    t->arch.cs_frame.r17 = r17;
+    t->arch.cs_frame.r15 = (vaddr_t)&initial_thread_func;
+    // NOTE: appears to be bug in binutils 2.25 that forces us to -8 from the offset
+    // using this method if gc-sections is enabled.
+    *(volatile uint32_t *)&t->arch.cs_frame.r15 -= 8;
 }
 
 void arch_context_switch(thread_t *oldthread, thread_t *newthread)

platform/microblaze/timer.c

@@ -101,7 +101,7 @@ enum handler_return timer_irq(void *arg)
 
 static void timer_init(uint level)
 {
-    TRACE;
+    LTRACE;
 
     register_int_handler(TIMER_IRQ, timer_irq, NULL);
     unmask_interrupt(TIMER_IRQ);