[platform][qemu-virt] make sure the PCI bus builds properly

Implement stubbed out versions of the msi allocation routines.

Add a stubbed out routine to allocate MSI vectors.

dev/interrupt/arm_gic/arm_gic.c

@@ -104,6 +104,10 @@ void register_int_handler(unsigned int vector, int_handler handler, void *arg) {
     spin_unlock_restore(&gicd_lock, state, GICD_LOCK_FLAGS);
 }
 
+void register_int_handler_msi(unsigned int vector, int_handler handler, void *arg, bool edge) {
+    PANIC_UNIMPLEMENTED;
+}
+
 #define GICREG(gic, reg) (*REG32(GICBASE(gic) + (reg)))
 
 /* main cpu regs */

platform/qemu-virt-riscv/plic.c

@@ -66,6 +66,10 @@ void register_int_handler(unsigned int vector, int_handler handler, void *arg) {
     handlers[vector].arg = arg;
 }
 
+void register_int_handler_msi(unsigned int vector, int_handler handler, void *arg, bool edge) {
+    PANIC_UNIMPLEMENTED;
+}
+
 enum handler_return riscv_platform_irq(void) {
     // see what irq triggered it
     uint32_t vector = *REG32(PLIC_CLAIM(riscv_current_hart()));