[platform][stm32f7xx] move mpu initialization into platform, set up inaccessible region at 0
This commit is contained in:
@@ -43,7 +43,11 @@
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extern uint8_t BSP_LCD_Init(void);
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extern uint8_t BSP_SRAM_Init(void);
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static void MPU_RegionConfig(void);
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const sdram_config_t target_sdram_config = {
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.bus_width = SDRAM_BUS_WIDTH_32,
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.cas_latency = SDRAM_CAS_LATENCY_3,
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.col_bits_num = SDRAM_COLUMN_BITS_8
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};
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void target_early_init(void)
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{
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@@ -58,112 +62,13 @@ void target_early_init(void)
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/* now that the uart gpios are configured, enable the debug uart */
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stm32_debug_early_init();
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#if defined(ENABLE_SDRAM)
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/* initialize sdram */
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sdram_config_t sdram_config;
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sdram_config.bus_width = SDRAM_BUS_WIDTH_32;
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sdram_config.cas_latency = SDRAM_CAS_LATENCY_3;
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sdram_config.col_bits_num = SDRAM_COLUMN_BITS_9;
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stm32_sdram_init(&sdram_config);
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#endif
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/* initialize external sram */
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BSP_SRAM_Init();
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/* initialize the mpu */
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MPU_RegionConfig();
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/* initialize the lcd panel */
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BSP_LCD_Init();
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}
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/**
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* @brief Configures the main MPU regions.
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* @param None
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* @retval None
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*/
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static void MPU_RegionConfig(void)
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{
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MPU_Region_InitTypeDef MPU_InitStruct;
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/* Disable MPU */
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HAL_MPU_Disable();
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uint region_num = 0;
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#if 1
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// SDRAM
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.BaseAddress = SDRAM_BASE;
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MPU_InitStruct.Size = MPU_REGION_SIZE_32MB;
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MPU_InitStruct.AccessPermission = MPU_REGION_PRIV_RW;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
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MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
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MPU_InitStruct.Number = region_num++;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
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MPU_InitStruct.SubRegionDisable = 0x00;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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#endif
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// SRAM
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#if 1
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.BaseAddress = EXT_SRAM_BASE;
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MPU_InitStruct.Size = MPU_REGION_SIZE_2MB;
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MPU_InitStruct.AccessPermission = MPU_REGION_PRIV_RW;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
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MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
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MPU_InitStruct.Number = region_num++;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
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MPU_InitStruct.SubRegionDisable = 0x00;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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#endif
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/* don't have to enable these if we let the MPU use default permissions for stuff other than SDRAM */
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#if 0
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/* Configure RAM region as Region N°0, 1MB of size and R/W region */
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.BaseAddress = 0x20000000;
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MPU_InitStruct.Size = MPU_REGION_SIZE_1MB;
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MPU_InitStruct.AccessPermission = MPU_REGION_PRIV_RW;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
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MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
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MPU_InitStruct.Number = 0;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
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MPU_InitStruct.SubRegionDisable = 0x00;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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/* Configure FLASH region as REGION N°1, 1MB of size and R/W region */
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MPU_InitStruct.BaseAddress = 0x02000000; // FLASH_ADDRESS_START;
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MPU_InitStruct.Size = MPU_REGION_SIZE_1MB; // FLASH_SIZE;
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MPU_InitStruct.Number = 1;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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/* Configure Peripheral region as REGION N°2, 0.5GB of size, R/W and Execute
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Never region */
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MPU_InitStruct.BaseAddress = 0x40000000; // PERIPH_ADDRESS_START;
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MPU_InitStruct.Size = MPU_REGION_SIZE_512KB; // PERIPH_SIZE;
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MPU_InitStruct.Number = 2; // PERIPH_REGION_NUMBER;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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#endif
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/* Enable MPU */
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HAL_MPU_Enable(MPU_HFNMI_PRIVDEF);
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}
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void target_init(void)
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{
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TRACE_ENTRY;
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@@ -22,6 +22,7 @@ GLOBAL_DEFINES += \
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SDRAM_SIZE=$(SDRAM_SIZE) \
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EXT_SRAM_BASE=$(EXT_SRAM_BASE) \
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EXT_SRAM_SIZE=$(EXT_SRAM_SIZE) \
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ENABLE_EXT_SRAM=1 \
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\
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WITH_STATIC_HEAP=1 \
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HEAP_START=$(HEAP_START) \
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@@ -39,7 +39,11 @@
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#include <lib/minip.h>
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#endif
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static void MPU_RegionConfig(void);
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const sdram_config_t target_sdram_config = {
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.bus_width = SDRAM_BUS_WIDTH_16,
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.cas_latency = SDRAM_CAS_LATENCY_2,
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.col_bits_num = SDRAM_COLUMN_BITS_8
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};
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void target_early_init(void)
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{
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@@ -53,20 +57,8 @@ void target_early_init(void)
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/* now that the uart gpios are configured, enable the debug uart */
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stm32_debug_early_init();
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#if defined(ENABLE_SDRAM)
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/* initialize SDRAM */
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sdram_config_t sdram_config;
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sdram_config.bus_width = SDRAM_BUS_WIDTH_16;
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sdram_config.cas_latency = SDRAM_CAS_LATENCY_2;
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sdram_config.col_bits_num = SDRAM_COLUMN_BITS_8;
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stm32_sdram_init(&sdram_config);
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MPU_RegionConfig();
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#endif
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}
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static uint8_t* gen_mac_address(void) {
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static uint8_t mac_addr[6];
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@@ -96,30 +88,6 @@ void target_init(void)
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#endif
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}
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static void MPU_RegionConfig(void)
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{
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MPU_Region_InitTypeDef MPU_InitStruct;
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HAL_MPU_Disable();
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uint region_num = 0;
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/* configure SDRAM */
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.BaseAddress = SDRAM_BASE;
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MPU_InitStruct.Size = MPU_REGION_SIZE_8MB;
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MPU_InitStruct.AccessPermission = MPU_REGION_PRIV_RW;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
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MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
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MPU_InitStruct.Number = region_num++;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
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MPU_InitStruct.SubRegionDisable = 0x00;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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HAL_MPU_Enable(MPU_HFNMI_PRIVDEF);
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}
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/**
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* @brief Initializes SDRAM GPIO.
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* called back from stm32_sdram_init
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@@ -209,7 +177,7 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
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GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
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GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
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/* Configure PC1, PC4 and PC5 */
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GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
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