diff --git a/platform/stm32f7xx/init.c b/platform/stm32f7xx/init.c index 08b54955..86859950 100644 --- a/platform/stm32f7xx/init.c +++ b/platform/stm32f7xx/init.c @@ -27,11 +27,17 @@ #include #include #include +#include #include uint32_t SystemCoreClock = HSI_VALUE; uint32_t stm32_unique_id[3]; +#if defined(ENABLE_SDRAM) +// target exports this with sdram configuration values +extern const sdram_config_t target_sdram_config; +#endif + void SystemInit(void) { /* FPU settings ------------------------------------------------------------*/ @@ -173,6 +179,64 @@ void stm32_rng_init(void) #endif } +/* set up the mpu to enable caching in the appropriate areas */ +static void mpu_init(void) +{ + MPU_Region_InitTypeDef MPU_InitStruct; + HAL_MPU_Disable(); + + uint region_num = 0; + + /* mark the first bit of the address space as inaccessible, to catch null pointers */ + MPU_InitStruct.Enable = MPU_REGION_ENABLE; + MPU_InitStruct.BaseAddress = 0x0; + MPU_InitStruct.Size = MPU_REGION_SIZE_128KB; /* 0x00200000 */ + MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS; + MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; + MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE; + MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; + MPU_InitStruct.Number = region_num++; + MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; + MPU_InitStruct.SubRegionDisable = 0x00; + MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE; + HAL_MPU_ConfigRegion(&MPU_InitStruct); + +#if defined(ENABLE_SDRAM) + /* configure SDRAM */ + MPU_InitStruct.Enable = MPU_REGION_ENABLE; + MPU_InitStruct.BaseAddress = SDRAM_BASE; + MPU_InitStruct.Size = MPU_REGION_SIZE_64MB; + MPU_InitStruct.AccessPermission = MPU_REGION_PRIV_RW; + MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE; + MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE; + MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; + MPU_InitStruct.Number = region_num++; + MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; + MPU_InitStruct.SubRegionDisable = 0x00; + MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; + HAL_MPU_ConfigRegion(&MPU_InitStruct); +#endif + + // SRAM +#if defined(ENABLE_EXT_SRAM) + MPU_InitStruct.Enable = MPU_REGION_ENABLE; + MPU_InitStruct.BaseAddress = EXT_SRAM_BASE; + MPU_InitStruct.Size = MPU_REGION_SIZE_2MB; // XXX use max size of aperture? + MPU_InitStruct.AccessPermission = MPU_REGION_PRIV_RW; + MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE; + MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE; + MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; + MPU_InitStruct.Number = region_num++; + MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; + MPU_InitStruct.SubRegionDisable = 0x00; + MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; + + HAL_MPU_ConfigRegion(&MPU_InitStruct); +#endif + + HAL_MPU_Enable(MPU_HFNMI_PRIVDEF); +} + void platform_early_init(void) { // Do general system init @@ -203,7 +267,12 @@ void platform_early_init(void) /* clear the reboot reason */ RCC->CSR |= (1<<24); -// ITM_SendChar('1'); +#if defined(ENABLE_SDRAM) + /* initialize SDRAM */ + stm32_sdram_init((sdram_config_t *)&target_sdram_config); +#endif + + mpu_init(); } void platform_init(void) @@ -219,7 +288,5 @@ void platform_init(void) stm32_timer_init(); stm32_flash_init(); - -// ITM_SendChar('2'); } diff --git a/target/stm32746g-eval2/init.c b/target/stm32746g-eval2/init.c index a1d1b807..7174d2ab 100644 --- a/target/stm32746g-eval2/init.c +++ b/target/stm32746g-eval2/init.c @@ -43,7 +43,11 @@ extern uint8_t BSP_LCD_Init(void); extern uint8_t BSP_SRAM_Init(void); -static void MPU_RegionConfig(void); +const sdram_config_t target_sdram_config = { + .bus_width = SDRAM_BUS_WIDTH_32, + .cas_latency = SDRAM_CAS_LATENCY_3, + .col_bits_num = SDRAM_COLUMN_BITS_8 +}; void target_early_init(void) { @@ -58,112 +62,13 @@ void target_early_init(void) /* now that the uart gpios are configured, enable the debug uart */ stm32_debug_early_init(); -#if defined(ENABLE_SDRAM) - /* initialize sdram */ - sdram_config_t sdram_config; - sdram_config.bus_width = SDRAM_BUS_WIDTH_32; - sdram_config.cas_latency = SDRAM_CAS_LATENCY_3; - sdram_config.col_bits_num = SDRAM_COLUMN_BITS_9; - stm32_sdram_init(&sdram_config); -#endif - /* initialize external sram */ BSP_SRAM_Init(); - /* initialize the mpu */ - MPU_RegionConfig(); - /* initialize the lcd panel */ BSP_LCD_Init(); } -/** - * @brief Configures the main MPU regions. - * @param None - * @retval None - */ -static void MPU_RegionConfig(void) -{ - MPU_Region_InitTypeDef MPU_InitStruct; - - /* Disable MPU */ - HAL_MPU_Disable(); - - uint region_num = 0; - -#if 1 - // SDRAM - MPU_InitStruct.Enable = MPU_REGION_ENABLE; - MPU_InitStruct.BaseAddress = SDRAM_BASE; - MPU_InitStruct.Size = MPU_REGION_SIZE_32MB; - MPU_InitStruct.AccessPermission = MPU_REGION_PRIV_RW; - MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE; - MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE; - MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; - MPU_InitStruct.Number = region_num++; - MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; - MPU_InitStruct.SubRegionDisable = 0x00; - MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; - - HAL_MPU_ConfigRegion(&MPU_InitStruct); -#endif - - // SRAM -#if 1 - MPU_InitStruct.Enable = MPU_REGION_ENABLE; - MPU_InitStruct.BaseAddress = EXT_SRAM_BASE; - MPU_InitStruct.Size = MPU_REGION_SIZE_2MB; - MPU_InitStruct.AccessPermission = MPU_REGION_PRIV_RW; - MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE; - MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE; - MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; - MPU_InitStruct.Number = region_num++; - MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; - MPU_InitStruct.SubRegionDisable = 0x00; - MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; - - HAL_MPU_ConfigRegion(&MPU_InitStruct); -#endif - - /* don't have to enable these if we let the MPU use default permissions for stuff other than SDRAM */ -#if 0 - /* Configure RAM region as Region N°0, 1MB of size and R/W region */ - MPU_InitStruct.Enable = MPU_REGION_ENABLE; - MPU_InitStruct.BaseAddress = 0x20000000; - MPU_InitStruct.Size = MPU_REGION_SIZE_1MB; - MPU_InitStruct.AccessPermission = MPU_REGION_PRIV_RW; - MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; - MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE; - MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; - MPU_InitStruct.Number = 0; - MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; - MPU_InitStruct.SubRegionDisable = 0x00; - MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; - - HAL_MPU_ConfigRegion(&MPU_InitStruct); - - /* Configure FLASH region as REGION N°1, 1MB of size and R/W region */ - MPU_InitStruct.BaseAddress = 0x02000000; // FLASH_ADDRESS_START; - MPU_InitStruct.Size = MPU_REGION_SIZE_1MB; // FLASH_SIZE; - MPU_InitStruct.Number = 1; - - HAL_MPU_ConfigRegion(&MPU_InitStruct); - - /* Configure Peripheral region as REGION N°2, 0.5GB of size, R/W and Execute - Never region */ - MPU_InitStruct.BaseAddress = 0x40000000; // PERIPH_ADDRESS_START; - MPU_InitStruct.Size = MPU_REGION_SIZE_512KB; // PERIPH_SIZE; - MPU_InitStruct.Number = 2; // PERIPH_REGION_NUMBER; - MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE; - - HAL_MPU_ConfigRegion(&MPU_InitStruct); -#endif - - /* Enable MPU */ - HAL_MPU_Enable(MPU_HFNMI_PRIVDEF); -} - - void target_init(void) { TRACE_ENTRY; diff --git a/target/stm32746g-eval2/rules.mk b/target/stm32746g-eval2/rules.mk index 61093a9f..7e5ebdd4 100644 --- a/target/stm32746g-eval2/rules.mk +++ b/target/stm32746g-eval2/rules.mk @@ -22,6 +22,7 @@ GLOBAL_DEFINES += \ SDRAM_SIZE=$(SDRAM_SIZE) \ EXT_SRAM_BASE=$(EXT_SRAM_BASE) \ EXT_SRAM_SIZE=$(EXT_SRAM_SIZE) \ + ENABLE_EXT_SRAM=1 \ \ WITH_STATIC_HEAP=1 \ HEAP_START=$(HEAP_START) \ diff --git a/target/stm32f746g-disco/init.c b/target/stm32f746g-disco/init.c index 0d44938f..418c4801 100644 --- a/target/stm32f746g-disco/init.c +++ b/target/stm32f746g-disco/init.c @@ -39,7 +39,11 @@ #include #endif -static void MPU_RegionConfig(void); +const sdram_config_t target_sdram_config = { + .bus_width = SDRAM_BUS_WIDTH_16, + .cas_latency = SDRAM_CAS_LATENCY_2, + .col_bits_num = SDRAM_COLUMN_BITS_8 +}; void target_early_init(void) { @@ -53,20 +57,8 @@ void target_early_init(void) /* now that the uart gpios are configured, enable the debug uart */ stm32_debug_early_init(); - -#if defined(ENABLE_SDRAM) - /* initialize SDRAM */ - sdram_config_t sdram_config; - sdram_config.bus_width = SDRAM_BUS_WIDTH_16; - sdram_config.cas_latency = SDRAM_CAS_LATENCY_2; - sdram_config.col_bits_num = SDRAM_COLUMN_BITS_8; - stm32_sdram_init(&sdram_config); - - MPU_RegionConfig(); -#endif } - static uint8_t* gen_mac_address(void) { static uint8_t mac_addr[6]; @@ -96,30 +88,6 @@ void target_init(void) #endif } -static void MPU_RegionConfig(void) -{ - MPU_Region_InitTypeDef MPU_InitStruct; - HAL_MPU_Disable(); - - uint region_num = 0; - - /* configure SDRAM */ - MPU_InitStruct.Enable = MPU_REGION_ENABLE; - MPU_InitStruct.BaseAddress = SDRAM_BASE; - MPU_InitStruct.Size = MPU_REGION_SIZE_8MB; - MPU_InitStruct.AccessPermission = MPU_REGION_PRIV_RW; - MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE; - MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE; - MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; - MPU_InitStruct.Number = region_num++; - MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; - MPU_InitStruct.SubRegionDisable = 0x00; - MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; - - HAL_MPU_ConfigRegion(&MPU_InitStruct); - HAL_MPU_Enable(MPU_HFNMI_PRIVDEF); -} - /** * @brief Initializes SDRAM GPIO. * called back from stm32_sdram_init @@ -209,7 +177,7 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth) GPIO_InitStructure.Alternate = GPIO_AF11_ETH; GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7; HAL_GPIO_Init(GPIOA, &GPIO_InitStructure); - + /* Configure PC1, PC4 and PC5 */ GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5; HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);