From 7bcf5f66c5b129d284d5a7c11c949d4fbaedfaa4 Mon Sep 17 00:00:00 2001 From: Carlos Pizano Date: Fri, 11 Sep 2015 11:02:29 -0700 Subject: [PATCH] [target][stm32f7] Configure Ethernet PHY for stm32f746g-disco --- .../Inc/stm32f7xx_hal_conf.h | 2 - platform/stm32f7xx/eth.c | 18 ++++-- platform/stm32f7xx/include/platform/eth.h | 37 +++++++++++ platform/stm32f7xx/include/platform/stm32.h | 5 -- target/stm32746g-eval2/init.c | 3 +- target/stm32f746g-disco/init.c | 63 +++++++++++++++++++ 6 files changed, 116 insertions(+), 12 deletions(-) create mode 100644 platform/stm32f7xx/include/platform/eth.h diff --git a/platform/stm32f7xx/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_conf.h b/platform/stm32f7xx/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_conf.h index c8d19a92..cc5dffab 100644 --- a/platform/stm32f7xx/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_conf.h +++ b/platform/stm32f7xx/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_conf.h @@ -189,8 +189,6 @@ /* Section 2: PHY configuration section */ -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY ((uint32_t)0x000000FF) /* PHY Configuration delay */ diff --git a/platform/stm32f7xx/eth.c b/platform/stm32f7xx/eth.c index 7ce90d47..0e1718f1 100644 --- a/platform/stm32f7xx/eth.c +++ b/platform/stm32f7xx/eth.c @@ -65,6 +65,7 @@ #include #include #include +#include #if WITH_LIB_MINIP #include @@ -73,6 +74,12 @@ #define LOCAL_TRACE 0 +/* LAN8742A PHY Address*/ +#define LAN8742A_PHY_ADDRESS 0x00 +/* DP83848 PHY Address*/ +#define DP83848_PHY_ADDRESS 0x01 + + struct eth_status { ETH_HandleTypeDef EthHandle; @@ -97,7 +104,7 @@ static int eth_rx_worker(void *arg); static int eth_send_raw_pkt(pktbuf_t *p); #endif -status_t eth_init(const uint8_t *mac_addr) +status_t eth_init(const uint8_t *mac_addr, eth_phy_itf eth_phy) { LTRACE_ENTRY; @@ -111,10 +118,12 @@ status_t eth_init(const uint8_t *mac_addr) eth.EthHandle.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE; eth.EthHandle.Init.Speed = ETH_SPEED_100M; eth.EthHandle.Init.DuplexMode = ETH_MODE_FULLDUPLEX; - eth.EthHandle.Init.MediaInterface = ETH_MEDIA_INTERFACE_MII; + eth.EthHandle.Init.MediaInterface = + eth_phy == PHY_DP83848 ? ETH_MEDIA_INTERFACE_MII : ETH_MEDIA_INTERFACE_RMII; eth.EthHandle.Init.RxMode = ETH_RXINTERRUPT_MODE; eth.EthHandle.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE; - eth.EthHandle.Init.PhyAddress = DP83848_PHY_ADDRESS; + eth.EthHandle.Init.PhyAddress = + eth_phy == PHY_DP83848 ? DP83848_PHY_ADDRESS : LAN8742A_PHY_ADDRESS; /* configure ethernet peripheral (GPIOs, clocks, MAC, DMA) */ if (HAL_ETH_Init(ð.EthHandle) == HAL_OK) { @@ -275,7 +284,8 @@ static int eth_rx_worker(void *arg) /* Check whether the link is up or down*/ if (val & PHY_LINK_STATUS) { - printf("eth: link up\n"); + //TODO(cpu): investigate why this keeps firing on the disco board. + //printf("eth: link up\n"); //netif_set_link_up(link_arg->netif); } else { printf("eth: link down\n"); diff --git a/platform/stm32f7xx/include/platform/eth.h b/platform/stm32f7xx/include/platform/eth.h new file mode 100644 index 00000000..d7ff8f11 --- /dev/null +++ b/platform/stm32f7xx/include/platform/eth.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2015 Carlos Pizano-Uribe + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files + * (the "Software"), to deal in the Software without restriction, + * including without limitation the rights to use, copy, modify, merge, + * publish, distribute, sublicense, and/or sell copies of the Software, + * and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ +#pragma once + +#include + +/* ethernet driver public api */ +typedef enum { + PHY_LAN8742A, // Microchip. + PHY_DP83848, // Texas Instruments. +} eth_phy_itf; + +struct pktbuf; + +status_t eth_init(const uint8_t *mac_addr, eth_phy_itf eth_phy); +status_t stm32_eth_send_minip_pkt(struct pktbuf *p); + diff --git a/platform/stm32f7xx/include/platform/stm32.h b/platform/stm32f7xx/include/platform/stm32.h index 660c6c94..6de81e76 100644 --- a/platform/stm32f7xx/include/platform/stm32.h +++ b/platform/stm32f7xx/include/platform/stm32.h @@ -35,8 +35,3 @@ void stm32_gpio_early_init(void); void stm32_flash_early_init(void); void stm32_flash_init(void); -/* ethernet driver public api */ -struct pktbuf; -status_t eth_init(const uint8_t *mac_addr); -status_t stm32_eth_send_minip_pkt(struct pktbuf *p); - diff --git a/target/stm32746g-eval2/init.c b/target/stm32746g-eval2/init.c index ecf11717..a1d1b807 100644 --- a/target/stm32746g-eval2/init.c +++ b/target/stm32746g-eval2/init.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include @@ -179,7 +180,7 @@ void target_init(void) mac_addr[0] &= ~(1<<0); mac_addr[0] |= (1<<1); - eth_init(mac_addr); + eth_init(mac_addr, PHY_DP83848); /* start minip */ minip_set_macaddr(mac_addr); diff --git a/target/stm32f746g-disco/init.c b/target/stm32f746g-disco/init.c index 99ee3a8d..c03d23ee 100644 --- a/target/stm32f746g-disco/init.c +++ b/target/stm32f746g-disco/init.c @@ -21,6 +21,7 @@ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ #include +#include #include #include #include @@ -29,6 +30,7 @@ #include #include #include +#include #include #include #include @@ -60,9 +62,23 @@ void target_early_init(void) #endif } + +static uint8_t* gen_mac_address(void) { + static uint8_t mac_addr[6]; + + for (size_t i = 0; i < sizeof(mac_addr); i++) { + mac_addr[i] = rand() & 0xff; + } + /* unicast and locally administered */ + mac_addr[0] &= ~(1<<0); + mac_addr[0] |= (1<<1); + return mac_addr; +} + void target_init(void) { stm32_debug_init(); + eth_init(gen_mac_address(), PHY_LAN8742A); } static void MPU_RegionConfig(void) @@ -142,3 +158,50 @@ void stm_sdram_GPIO_init(void) HAL_GPIO_Init(GPIOH, &gpio_init_structure); } + +/** + * @brief Initializes the ETH MSP. + * @param heth: ETH handle + * @retval None + */ +/* called back from the HAL_ETH_Init routine */ +void HAL_ETH_MspInit(ETH_HandleTypeDef *heth) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /* Enable GPIOs clocks */ + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + + /* Ethernet pins configuration ************************************************/ + /* + RMII_REF_CLK ----------------------> PA1 + RMII_MDIO -------------------------> PA2 + RMII_MDC --------------------------> PC1 + RMII_MII_CRS_DV -------------------> PA7 + RMII_MII_RXD0 ---------------------> PC4 + RMII_MII_RXD1 ---------------------> PC5 + RMII_MII_TX_EN --------------------> PG11 + RMII_MII_TXD0 ---------------------> PG13 + RMII_MII_TXD1 ---------------------> PG14 + */ + + /* Configure PA1, PA2 and PA7 */ + GPIO_InitStructure.Speed = GPIO_SPEED_HIGH; + GPIO_InitStructure.Mode = GPIO_MODE_AF_PP; + GPIO_InitStructure.Pull = GPIO_NOPULL; + GPIO_InitStructure.Alternate = GPIO_AF11_ETH; + GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7; + HAL_GPIO_Init(GPIOA, &GPIO_InitStructure); + + /* Configure PC1, PC4 and PC5 */ + GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5; + HAL_GPIO_Init(GPIOC, &GPIO_InitStructure); + + /* Configure PG2, PG11, PG13 and PG14 */ + GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14; + HAL_GPIO_Init(GPIOG, &GPIO_InitStructure); +} + +