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[arch][arm] fix cache flush routines to pass proper address to pl310

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-add another sync in a few of the pl310 routines
This commit is contained in:
Travis Geiselbrecht
2014-10-18 23:53:09 -07:00
parent 1baac2f315
commit 74ab42c118
2 changed files with 33 additions and 11 deletions
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4
dev/cache/pl310/pl310.c vendored
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@@ -141,6 +141,8 @@ void pl310_invalidate(void)
if (unlikely(!pl310_enabled()))
return;
PL310_REG(REG7_INV_WAY) = 0xffff;
while (PL310_REG(REG7_INV_WAY) != 0)
;
}
void pl310_flush_invalidate(void)
@@ -148,6 +150,8 @@ void pl310_flush_invalidate(void)
if (unlikely(!pl310_enabled()))
return;
PL310_REG(REG7_CLEAN_INV_WAY) = 0xffff;
while (PL310_REG(REG7_CLEAN_INV_WAY) != 0)
;
}
void pl310_sync_range(void)