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[platform][sifive] add switch to scripts/do-riscvqemu to run sifive unleashed

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Also fix up some broken bits on the previously unused qemu-sifive-u target.
This commit is contained in:
Travis Geiselbrecht
2020-12-30 01:32:33 -08:00
parent 1e50428091
commit 6ea6256d89
4 changed files with 43 additions and 22 deletions
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29
scripts/do-qemuriscv
View File

@@ -10,7 +10,8 @@ function HELP {
echo "-n a virtio network device"
echo "-t a virtio tap network device"
echo "-d a virtio display"
echo "-e embeded platform"
echo "-e sifive e platform"
echo "-u sifive u platform"
echo "-6 64bit"
echo "-S supervisor mode (using OpenSBI)"
echo " currently only works in 64bit mode"
@@ -26,6 +27,7 @@ DO_NET_TAP=0
DO_BLOCK=0
DO_64BIT=0
DO_EMBEDDED=0
DO_UNLEASHED=0
DO_DISPLAY=0
DO_CMPCTMALLOC=0
DO_MINIHEAP=0
@@ -36,7 +38,7 @@ SUDO=""
PROJECT=""
BIOS="none"
while getopts bdhm:cMmnte6p:s:S FLAG; do
while getopts bdhm:cMmnteu6p:s:S FLAG; do
case $FLAG in
b) DO_BLOCK=1;;
c) DO_CMPCTMALLOC=1;;
@@ -45,6 +47,7 @@ while getopts bdhm:cMmnte6p:s:S FLAG; do
n) DO_NET=1;;
t) DO_NET_TAP=1;;
e) DO_EMBEDDED=1;;
u) DO_UNLEASHED=1;;
6) DO_64BIT=1;;
m) MEMSIZE=$OPTARG;;
s) SMP=$OPTARG;;
@@ -59,7 +62,23 @@ done
shift $((OPTIND-1))
if (( $DO_64BIT )); then
if (( $DO_UNLEASHED == 1 )); then
QEMU="qemu-system-riscv64"
MACHINE="sifive_u"
_PROJECT="qemu-sifive-u-test"
if (( $SMP == 1 )); then
SMP=2
fi
if (( $MEMSIZE == 512 )); then
MEMSIZE=8192
fi
CPU="sifive-u54"
BIOS="default"
elif (( $DO_EMBEDDED == 1 )); then
QEMU="qemu-system-riscv32"
MACHINE="sifive_e"
_PROJECT="sifive-e-test"
elif (( $DO_64BIT )); then
QEMU="qemu-system-riscv64"
CPU="rv64"
MACHINE="virt"
@@ -69,10 +88,6 @@ if (( $DO_64BIT )); then
else
_PROJECT="qemu-virt-riscv64-test"
fi
elif (( $DO_EMBEDDED == 1 )); then
QEMU="qemu-system-riscv32"
MACHINE="sifive_e"
_PROJECT="sifive-e-test"
else
QEMU="qemu-system-riscv32"
CPU="rv32"

7
target/qemu-sifive-u/include/platform/sifive.h
View File

@@ -5,7 +5,6 @@
* license that can be found in the LICENSE file or at
* https://opensource.org/licenses/MIT
*/
#pragma once
#define SIFIVE_IRQ_UART0 4
@@ -19,7 +18,7 @@
#define UART1_BASE 0x10011000
#if RISCV_XMODE_OFFSET == RISCV_MACH_OFFSET
#define PLIC_HART_IDX(hart) (2 * (hart))
#define PLIC_HART_IDX(hart) ((hart) ? ((2 * (hart)) - 1) : 0)
#elif RISCV_XMODE_OFFSET == RISCV_SUPER_OFFSET
#define PLIC_HART_IDX(hart) ((2 * (hart)) + 1)
#endif
#define PLIC_HART_IDX(hart) ((hart) ? (2 * (hart)) : ~0U)
#endif

6
target/qemu-sifive-u/rules.mk
View File

@@ -7,16 +7,16 @@ VARIANT := sifive_u
GLOBAL_DEFINES += SIFIVE_FREQ=5000000 # 5 MHz
RISCV_MODE ?= machine
RISCV_MODE ?= supervisor
ifeq ($(RISCV_MODE),supervisor)
MEMBASE ?= 0x080200000
MEMBASE ?= 0x080300000
else
MEMBASE ?= 0x080000000
endif
MEMSIZE ?= 0x200000000 # 8 GiB
WITH_SMP := 0
WITH_SMP := 1
SMP_MAX_CPUS := 4
MODULE_SRCS := $(LOCAL_DIR)/target.c

23
target/sifive-unleashed/target.c
View File

@@ -10,6 +10,9 @@
#include <arch/arch_ops.h>
#include <platform/sifive.h>
// NOTE: set to 0 if trying to boot on qemu
#define ENABLE_DEBUG_LED 1
static volatile struct {
volatile uint32_t pwmcfg;
volatile uint32_t res0;
@@ -21,18 +24,22 @@ static volatile struct {
} *const pwm0_base = (void*)PWM0_BASE;
void target_early_init(void) {
pwm0_base->pwmcfg = 0x100f; // enable always and max scaling
target_set_debug_led(0, false);
target_set_debug_led(1, false);
target_set_debug_led(2, false);
target_set_debug_led(3, false);
if (ENABLE_DEBUG_LED) {
pwm0_base->pwmcfg = 0x100f; // enable always and max scaling
target_set_debug_led(0, false);
target_set_debug_led(1, false);
target_set_debug_led(2, false);
target_set_debug_led(3, false);
}
}
void target_init(void) {
}
void target_set_debug_led(unsigned int led, bool on) {
if(led > 3)
return;
pwm0_base->pwmcmp[led] = (0xffff + on) & 0xffff;
if (ENABLE_DEBUG_LED) {
if(led > 3)
return;
pwm0_base->pwmcmp[led] = (0xffff + on) & 0xffff;
}
}